JPS60160652U - stereo multiplex circuit - Google Patents
stereo multiplex circuitInfo
- Publication number
- JPS60160652U JPS60160652U JP1984048129U JP4812984U JPS60160652U JP S60160652 U JPS60160652 U JP S60160652U JP 1984048129 U JP1984048129 U JP 1984048129U JP 4812984 U JP4812984 U JP 4812984U JP S60160652 U JPS60160652 U JP S60160652U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- differential amplifier
- voltage
- stereo
- stop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、従来のステレオマルチプレックス回 ６路
を示す回路図、第２図は本考案の一実施例を示す回路図
、及び第３図は本考案の別の実施例を示す回路図である
。FIG. 1 is a circuit diagram showing a conventional stereo multiplex circuit with six circuits, FIG. 2 is a circuit diagram showing one embodiment of the present invention, and FIG. 3 is a circuit diagram showing another embodiment of the present invention. be.
Claims (1)
プレックス回路において、第１電圧と該第１電圧よりも
高い第２電圧とを発生する電圧発生回路、前記円上中に
含まれるＶＣＯの出力信号を分周して得られる信号を用
いてコンポジット信号中に含まれる１９ＫＨｚパイロッ
ト信号を同期検波する同期検波回路、該同期検波回路の
出力信号がローパスフィルタを介して印加される差動増
幅回路、該差動増幅回路の出力信号に応じて点灯するス
テレオ表示器、前記差動増幅回路の出力信号に応じてス
テレオデコーダのステレオ分離動作を停止させる第１停
止回路、前記差動増幅回路の入力端子間電圧を検出する
検出回路、及び該検出回路の出力信号に応じて前記ＶＣ
Ｏの発振を停止させる第２停止回路から成り、前記電圧
発生回路から前記差動増幅回路の一方のトランジスタの
ベースに第１電圧が印加されたとき、前記差動増幅回路
の出力により第１停止回路が作動し、ステレオデコーダ
のステレオ分離動作が停止してモノラル状態になり、前
記電圧発生回路から前記差動増幅回路の一方のトランジ
スタのベースに第２電圧が印加されたとき、検出回路の
出力により第２停止回路が作動し、ＶＣＯの発振が停止
する様にしたステレオマルチプレックス回路。In a stereo multiplex circuit that uses a PLL to reproduce a subcarrier, a voltage generation circuit that generates a first voltage and a second voltage higher than the first voltage, and an output signal of a VCO included in the circle A synchronous detection circuit that synchronously detects a 19 KHz pilot signal included in a composite signal using a signal obtained by frequency division, a differential amplifier circuit to which an output signal of the synchronous detection circuit is applied via a low-pass filter, and a differential amplifier a stereo indicator that lights up in response to the output signal of the differential amplifier circuit; a first stop circuit that stops the stereo separation operation of the stereo decoder in response to the output signal of the differential amplifier circuit; and a voltage between input terminals of the differential amplifier circuit. a detection circuit that detects the VC, and a detection circuit that detects the VC according to the output signal of the detection circuit.
a second stop circuit that stops the oscillation of O, and when a first voltage is applied from the voltage generation circuit to the base of one transistor of the differential amplifier circuit, the output of the differential amplifier circuit causes the first stop circuit to stop. When the circuit is activated, the stereo separation operation of the stereo decoder is stopped and the state becomes monaural, and a second voltage is applied from the voltage generation circuit to the base of one transistor of the differential amplifier circuit, the output of the detection circuit A stereo multiplex circuit in which the second stop circuit is activated and the oscillation of the VCO is stopped.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984048129U JPS60160652U (en) | 1984-04-02 | 1984-04-02 | stereo multiplex circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984048129U JPS60160652U (en) | 1984-04-02 | 1984-04-02 | stereo multiplex circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60160652U true JPS60160652U (en) | 1985-10-25 |
| JPH0354449Y2 JPH0354449Y2 (en) | 1991-12-02 |
Family
ID=30564087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984048129U Granted JPS60160652U (en) | 1984-04-02 | 1984-04-02 | stereo multiplex circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60160652U (en) |
-
1984
- 1984-04-02 JP JP1984048129U patent/JPS60160652U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0354449Y2 (en) | 1991-12-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS60160652U (en) | stereo multiplex circuit | |
| JPS604074U (en) | TV audio multiplex signal receiver | |
| JPS60155238U (en) | stereo multiplex circuit | |
| JPS6072051U (en) | AM stereo indicator circuit | |
| JPS5948157U (en) | stereo receiver | |
| JPS58185000U (en) | stereo wide circuit | |
| JPS619968U (en) | Television receiver audio switching circuit | |
| JPS58189615U (en) | FM demodulation circuit | |
| JPS5922579U (en) | Reference time signal generation circuit | |
| JPS58190810U (en) | Multiplex filter control circuit | |
| JPS59189709U (en) | Dropout compensation circuit | |
| JPS6098971U (en) | Synchronous detection circuit | |
| JPS59152872U (en) | Audio multiplex broadcast receiving circuit | |
| JPS58172247U (en) | Stereo/monaural switching circuit of stereo receiver | |
| JPS59106250U (en) | FM monaural/stereo switching circuit | |
| JPS60189153U (en) | Stereo lamp erroneous lighting prevention circuit | |
| JPS59164323U (en) | Amplifier volume control circuit | |
| JPS58173021U (en) | Dropout detection circuit | |
| JPS5857147U (en) | PLL stereo demodulator | |
| JPS587217U (en) | Master clock generation circuit | |
| JPS6057257U (en) | FM/AM stereo tuner | |
| JPS59189711U (en) | Dropout compensation circuit | |
| JPS59125141U (en) | switching circuit | |
| JPS59149753U (en) | stereo demodulator | |
| JPS6123769U (en) | Synchronous separation circuit |