JPS58172247U - Stereo/monaural switching circuit of stereo receiver - Google Patents
Stereo/monaural switching circuit of stereo receiverInfo
- Publication number
- JPS58172247U JPS58172247U JP6890682U JP6890682U JPS58172247U JP S58172247 U JPS58172247 U JP S58172247U JP 6890682 U JP6890682 U JP 6890682U JP 6890682 U JP6890682 U JP 6890682U JP S58172247 U JPS58172247 U JP S58172247U
- Authority
- JP
- Japan
- Prior art keywords
- stereo
- potential
- monaural
- circuit
- switching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Stereo-Broadcasting Methods (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のステレオ受信機のステレオ・モノラル切
換回路を示す回路図、第２図は本考案に係るステレオ・
モノラル切換回路を示す回路図である。
１・・・シグナルメーター駆動用集積回路、２・・・シ
グナルメーター、３・・・ステレオ復調用集積回路、Ｄ
□・・・ダイオード。Fig. 1 is a circuit diagram showing a stereo/monaural switching circuit of a conventional stereo receiver, and Fig. 2 is a circuit diagram showing a stereo/monaural switching circuit of a conventional stereo receiver.
FIG. 3 is a circuit diagram showing a monaural switching circuit. DESCRIPTION OF SYMBOLS 1... Integrated circuit for signal meter drive, 2... Signal meter, 3... Integrated circuit for stereo demodulation, D
□...Diode.
Claims (1)
に出力電位が第１電位から第２電位に反転する出力端子
を有するシグナルメーター駆動回路と、ステレオ・モノ
ラル切換用制御信号入力端子に前記第１電位の信号が印
加されたときモノラル状態となるステレオ復調回路とよ
りなり、前記シグナルメーター駆動回路の出力端子と前
記ステレオ復調回路のステレオ・モノラル切換用制御信
号入力端子をダイオードを介して接続し、受信信号の強
度が前記所定レベル以下のとき前記ステレオ復調回路を
強制的にモノラル状態にしてなるステレオ受信機のステ
レオ・モノラル切換回路。 （２）第１電位はローレベルの電位であり、第２電位は
ハイレベルの電位であることを特徴とする実用新案登録
請求の範囲第１項記載のステレオ受信機のステレオ・モ
ノラル切換回路。[Claims for Utility Model Registration] (1) A signal meter drive circuit having an output terminal whose output potential is inverted from a first potential to a second potential when the strength of a received signal exceeds a predetermined level; a stereo demodulation circuit that enters a monaural state when a signal at the first potential is applied to a monaural switching control signal input terminal, and a stereo/monaural switching control between an output terminal of the signal meter drive circuit and the stereo demodulation circuit; A stereo/monaural switching circuit for a stereo receiver, wherein a signal input terminal is connected through a diode, and the stereo demodulation circuit is forced to be in a monaural state when the strength of a received signal is below the predetermined level. (2) The stereo/monaural switching circuit for a stereo receiver according to claim 1, wherein the first potential is a low level potential and the second potential is a high level potential.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6890682U JPS58172247U (en) | 1982-05-11 | 1982-05-11 | Stereo/monaural switching circuit of stereo receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6890682U JPS58172247U (en) | 1982-05-11 | 1982-05-11 | Stereo/monaural switching circuit of stereo receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58172247U true JPS58172247U (en) | 1983-11-17 |
| JPS6241475Y2 JPS6241475Y2 (en) | 1987-10-23 |
Family
ID=30078654
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6890682U Granted JPS58172247U (en) | 1982-05-11 | 1982-05-11 | Stereo/monaural switching circuit of stereo receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58172247U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007067546A (en) * | 2005-08-29 | 2007-03-15 | Sanyo Electric Co Ltd | Semiconductor integrated circuit and sound multiplex signal processing circuit |
-
1982
- 1982-05-11 JP JP6890682U patent/JPS58172247U/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007067546A (en) * | 2005-08-29 | 2007-03-15 | Sanyo Electric Co Ltd | Semiconductor integrated circuit and sound multiplex signal processing circuit |
| JP4700440B2 (en) * | 2005-08-29 | 2011-06-15 | 三洋電機株式会社 | Semiconductor integrated circuit and audio multiplex signal processing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6241475Y2 (en) | 1987-10-23 |
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