JPH0354449Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field The present invention relates to a stereo multiplex circuit used in a stereo broadcast receiver, and is particularly concerned with forced monaural and VCO (voltage) circuits in PLL (phase locked loop). The present invention relates to a stereo multiplex circuit that can easily and reliably stop oscillation of a controlled oscillator. (b) Prior art When receiving stereo broadcasts, the S/N ratio deteriorates when receiving radio waves with weak field strength in stereo.
In a normal receiver, the stereo multiplex circuit is forced into a monaural state and monaural reception is performed to improve the S/N ratio. Also,
For AM/FM shared receivers that use PLL for FM stereo reception, in order to prevent beats from occurring between the AM intermediate frequency and the VCO output signal when receiving AM broadcasts, Said
The VCO oscillation is stopped. Although such a technique is disclosed in Japanese Patent Publication No. 55-41582, it does not describe a specific method for forcing monaural sound and stopping the oscillation of the VCO. By the way, the above publication describes forced monaural circuits and
The first circuit has a VCO oscillation stop circuit added.
Something like the one shown in the figure can be considered. In Figure 1, 1
are phase comparator 2, low-pass filter 3, DC amplifier circuit 4, VCO 5, first and second frequency dividers 6 and 7
8 is a stereo decoder that reproduces left and right stereo signals using the 38KHz output signal of the first frequency divider 6, and 9 is the 38KHz signal.
A third frequency divider that divides the output signal to generate a 19KHz signal; 10 is the 19KHz output signal of the third frequency divider 9;
A synchronous detection circuit that synchronously detects a 19KHz stereo pilot signal, 11 a low-pass filter that passes the output signal of the synchronous detection circuit 10, and 12 a drive signal for a light-emitting diode 13 for stereo display according to the output signal of the low-pass filter 11. 14 is an external power supply; 15 is the external power supply 14;
A control signal generation circuit 16 generates a forced monaural output or an output for stopping oscillation of the VCO 5 according to the level of the voltage applied from the drive circuit 12, and 16 a first frequency divider according to the output signal of the drive circuit 12. 6's
This is a stop circuit to prevent the 38KHz output signal from being applied to the stereo decoder 8. When performing normal stereo reception, leave the switch 17 for external voltage application open and input terminal 18.
A stereo composite signal is applied to the Then, VCO5 is synchronized with the 19KHz stereo pilot signal by the action of PLL1, so the first and second
The output signals of frequency dividers 6 and 7 are also synchronized with the pilot signal. Therefore, the stereo composite signal applied to the input terminal 18 is demodulated by the stereo decoder 8 using the output signal of the first frequency divider 6, and left and right stereo signals are generated at the left and right stereo terminals 19 and 20. In addition, the input terminal 18
19K in a stereo composite signal applied to
The Hz stereo pilot signal is sent to the synchronous detection circuit 10.
The signal is detected by the output signal of the third frequency divider 9 and applied to the drive circuit 12 via the low-pass filter 11, so that the stereo display light emitting diode 13 lights up to display stereo reception. Further, in order to perform monaural reception, when the switch 17 is closed and the first voltage V ₁ from the external power supply 14 is applied to the control signal generation circuit 15, the control signal generation circuit 15 detects the magnitude of the first voltage V ₁ . determine the
A voltage of "H" is generated at the first output terminal 15a. The "H" voltage is applied to the drive circuit 12, and the drive circuit 12 is forcibly driven, so that the stereo display light emitting diode 13 is turned off, the stop circuit 16 is activated, and the stereo decoder 8 receives the first signal.
The output signal of frequency divider 6 is no longer applied. Therefore, the stereo demodulation operation of the stereo decoder 8 is stopped, and monaural reception is achieved. Furthermore, in the case of receiving AM broadcasting, switch 17
is closed, and the second voltage V ₂ from the external power supply 14 is applied to the control signal generation circuit 15 . Then, the control signal generation circuit 15 determines the magnitude of the second voltage V ₂ and outputs the first and second output terminals 15a and 15b.
generates an “H” signal. Therefore, the "H" signal generated at the first output terminal 15a is transmitted to the drive circuit 12.
is forcibly driven and the stop circuit 16 is activated.
The stereo decoder 8 becomes monaural. At the same time, the "H" signal generated at the second output terminal 15b is
Since the voltage is applied to the VCO 5, the oscillation of the VCO 5 is stopped. Therefore, if the circuit of FIG. 1 is used, switch 17
By simply switching the voltage of the external power supply 14,
Stereo reception of stereo broadcasts, monaural reception of FM stereo broadcasts, and good reception of AM broadcasts are achieved. However, in the circuit of Figure 1,
The external voltage applied from the external power supply 14 is zero,
A special discrimination circuit must be provided in the control signal generation circuit 15 to determine which of the three, V ₁ or V ₂ , and the configuration of the control signal generation circuit 15 becomes complicated. It had drawbacks. Furthermore, when the control signal generation circuit 15 is incorporated into a single IC (integrated circuit) together with other circuit parts, a special terminal pin is required to connect the switch 17 and the input end of the control signal generation circuit 15. This has resulted in an increase in the number of pins, which is not desirable for ICs. (c) Purpose of the invention The present invention has been made in view of the above-mentioned points, and aims to provide a stereo multiplex circuit that has a simple configuration and does not cause any drawbacks when integrated into an IC. (d) Structure of the invention The stereo multiplex circuit according to the invention includes a PLL for reproducing subcarriers, a synchronous detection circuit for synchronously detecting a 19KHz stereo pilot signal, and an output signal of the synchronous detection circuit passing through a low-pass filter. a first stop circuit that stops the stereo separation operation of the stereo decoder according to the output signal of the differential amplifier circuit; and a first stop circuit that detects the voltage between the input terminals of the differential amplifier circuit. a detection circuit, a second stop circuit that stops the oscillation of the VCO according to the output signal of the detection circuit, and a first voltage applied to the base of one transistor of the differential amplifier circuit or a second voltage higher than the first voltage. and a voltage generating circuit that applies voltage. (E) Embodiment Figure 2 is a circuit diagram showing an embodiment of the present invention.
21 is a synchronous detection circuit that synchronously detects the 19KHz stereo pilot signal applied to the input terminal 22 ;
3 is a differential amplifier circuit that amplifies the output signal of the synchronous detection circuit 22; 24 to 26 are the differential amplifier circuits 23;
27 is a light emitting diode for stereo display that lights up when the third drive transistor 26 is turned on; 28 is a light emitting diode for stereo display that generates a drive signal according to the output signal of the second drive transistor 25 a first stop circuit that generates a first stop signal that causes a stereo decoder (not shown) to stop the stereo separation operation in response; 29 is a first voltage;
an external power source that generates V ₁ and a second voltage _{V 2 higher} than the first voltage V 1; 30 is a switch for supplying the output voltage of the external power source 29 to the differential amplifier circuit 23 ;
31 is a detection transistor that detects the voltage between the input terminals of the differential amplifier circuit 23 , and 32 is a VCO 33 that detects the voltage between the input terminals of the differential amplifier circuit 23;
This short-circuit transistor constitutes a second stop circuit that grounds the base of the constant current source transistor 34. Note that 35 is a capacitor constituting a low-pass filter through which the output signal of the synchronous detection circuit 21 passes, and is externally connected to terminal pins 36 and 37 of the IC. Next, the operation will be explained. First, when performing stereo reception, the switch 30 is opened as shown, and a stereo composite signal is applied to the input terminal 22. Then, in the stereo composite signal,
The 19KHz stereo pilot signal is synchronously detected by a synchronous detection circuit 21, and the detection output signal is applied to a differential amplifier circuit 23 via a low-pass filter.
The synchronous detection circuit 21 has the same configuration as that in FIG.
The base voltage of the second transistor 39 becomes higher than the base voltage of the second transistor 39, and the collector current of the second transistor 39 becomes larger than the collector current of the transistor 40 forming the current mirror circuit. At that time,
Unnecessary components in the output signal of the synchronous detection circuit 21 are removed by a low-pass filter including a capacitor 35. When the collector current of the second transistor 39 of the differential amplifier circuit 23 becomes large, the first to third transistors
The drive transistors 24 to 26 are turned on, and the stereo display light emitting diode 27 lights up to indicate stereo reception. Further, since the second drive transistor 25 is turned on, the input terminal of the first stop circuit 28 becomes "H", and the first stop circuit 28 becomes "H".
8 does not work. Therefore, the stereo decoder (not shown) operates normally and separates the left and right stereo signals (L) and (R). Since the detection output signal of the synchronous detection circuit 21 is on the order of several mV to several tens of mV, the voltage between the bases of the first and second transistors 38 and 39 of the differential amplifier circuit 23 is also on the order of several tens of mV to several tens of mV. becomes. Therefore, the detection transistor 31 is not turned on, and the shorting transistor 32 is not turned on either. Therefore, the VCO 33 also maintains a normal oscillation state. When the S/N ratio deteriorates due to a decrease in the electric field strength of broadcast radio waves, etc., the switch 30 is closed and the first voltage V 1 of the external power supply 29 is applied to the first voltage V ₁ of the differential amplifier circuit 23 .
applied to the base of transistor 38. Then,
The differential amplifier circuit 23 is forcibly driven by the first voltage _V1 , and the first transistor 38 is turned on and the second transistor 39 is turned off. Therefore, the first
The third drive transistors 24 to 26 are also turned off, the stereo display light emitting diode 27 is turned off, and the first stop circuit 28 is activated. Therefore, as in the case of FIG. 1, the stereo decoder stops the separation operation and enters the monaural reception state. Between the base of the detection transistor 31 and the base of the second transistor 39 of the differential amplifier circuit 23 , n diodes 41 are connected. Therefore, if the voltage between the input terminals of the differential amplifier circuit 23 is less than (n+1)V _BE (however, V _BE is the rising voltage of the diode and transistor),
The detection transistor 31 is never turned on. Therefore, the first voltage V ₁ of the external power supply 29
is set to be equal to or lower than the voltage (n+1) _VBE , so even if the first voltage _V1 is applied, the detection transistor 31 will not be turned on, and the shorting transistor 32 will not be turned on either. Furthermore, if you want to receive AM broadcasts, switch 3.
0 is closed, and a second voltage V ₂ is applied from the external power supply 29 to the base of the first transistor 38 of the differential amplifier circuit 23 . Since the second voltage V ₂ is higher than the level of the first voltage V ₁ , the first transistor 3
8 is on, the second transistor 39 is off,
The stereo display light emitting diode 27 is turned off, and the first stop circuit 28 is activated. Further, since the second voltage V ₂ is made sufficiently larger than the voltage (n+1) V _BE , the detection transistor 3
1 turns on, and the shorting transistor 32 turns on.
The oscillation of the VCO 33 is stopped. Therefore, with the circuit configuration as shown in FIG. 2, the stereo multiplex circuit can be forced into a monaural state when the first voltage V ₁ is applied from the external power source 29, and the second voltage V1 from the external power source 29 is applied.
When V ₂ is applied, the oscillation of the VCO 33 of the stereo multiplex circuit can be stopped. At that time, a capacitor 35 of a low-pass filter that passes the output signal of the synchronous detection circuit 21
are externally attached to the terminal pins 36 and 37 of the IC, so the above operation can be achieved simply by connecting the external power supply 29 to the terminal pins 36, and no special terminal pins are required. FIG. 3 is a circuit diagram showing another embodiment of the present invention, in which the emitter 31 of the detection transistor 31 is connected to the emitter of an NPN transistor 43 via a resistor 42, and the collector of the NPN transistor 43 is connected to the power supply (+V _CC ), and the base is connected to the first transistor 3 of the differential amplifier circuit 23 in FIG.
It is connected to the base of 8. With the circuit configuration as shown in FIG. 3, the input impedance seen from the base of the NPN transistor 43 can be increased, and the detection transistor 31 can be driven with a minute current. (f) Effects of the invention As described above, according to the invention, forced monaural and VCO oscillation can be stopped with a simple configuration, and a circuit that detects the level of the voltage forcibly applied from the outside can be used. It has the advantage that there is no need to provide two. Furthermore, according to the present invention, when applying a forced voltage from the outside, the terminal pins to which the capacitors forming the low-pass filter are connected can be commonly used, so there is no need to increase the number of terminal pins when implementing an IC. It has the advantage of not having any Furthermore, as shown in Figure 3, if a transistor is added to the detection transistor to increase the input impedance,
The influence of the impedance of the external power supply is reduced, and a stable circuit can be provided.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional stereo multiplex circuit, FIG. 2 is a circuit diagram showing one embodiment of the present invention, and FIG. 3 is a circuit diagram showing another embodiment of the present invention. Explanation of main drawing numbers, 21... Synchronous detection circuit, 23
... Differential amplifier circuit, 28 ... First short circuit, 29
...External power supply, 31...Detection transistor, 32
...short circuit transistor, 33...VCO.

Claims (1)

[Scope of utility model registration request] In a stereo multiplex circuit using a PLL to reproduce a subcarrier, a voltage generating circuit generates a first voltage and a second voltage higher than the first voltage, and divides an output signal of a VCO included in the PLL. A synchronous detection circuit that synchronously detects a 19KHz pilot signal included in a composite signal using a signal obtained by frequency detection; a differential amplifier circuit to which the output signal of the synchronous detection circuit is applied via a low-pass filter; a stereo indicator that lights up in response to the output signal of the differential amplifier circuit; a first stop circuit that stops the stereo separation operation of the stereo decoder in response to the output signal of the differential amplifier circuit; It consists of a detection circuit for detecting the signal, and a second stop circuit for stopping the oscillation of the VCO according to the output signal of the detection circuit, and a first voltage is applied from the voltage generation circuit to the base of one of the transistors of the differential amplifier circuit. When the voltage is applied, the first stop circuit is activated by the output of the differential amplifier circuit, the stereo separation operation of the stereo decoder is stopped and the state becomes monaural, and one transistor of the differential amplifier circuit is switched from the voltage generating circuit to the first stop circuit. When a second voltage is applied to the base of the stereo multiplex circuit, the second stop circuit is activated by the output of the detection circuit, and the oscillation of the VCO is stopped.