JPS60140759A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high-frequency transistor, noise characteristics thereof are improved, by preparing an emitter layer constituting a bipolar transistor by a polycrystalline Si layer, forming the emitter layer to a fine shape exceeding the limit obtained through a photoetching method and bringing a base region to low resistivity. CONSTITUTION:An N<-> type layer 2 is grown on an N<+> type semiconductor substrate 1 in an epitaxial manner, a P type base layer 3 is diffused and formed to the surface layer section of the layer 2, insulating films 4 are shaped to the peripheral section of the substrate 1, and a polycrystalline Si layer 8 containing an N type impurity is deposited on the whole surface containing the insulating films 4. A photo-resist film 10 using an Si3N4 film 9 as an underlay is formed at the central section of the surface of the layer 8, the Si layer 8 positioned on the region 3 is over-etched, and the thin columnar layer 8 is left only under the film 9. The peripheral section of the layer 8 is buried with an oxide film 12 connected to the films 4, the film 10 is removed, and P<+> type base regions 11 having high impurity concentration and low resistivity are diffused and shaped into the base layer 3 as using the residual film 9 as a mask while the impurity in the layer 8 is diffused under the film 9 to form an N type emitter layer 13.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor device, particularly a high frequency bipolar transistor.

In order to improve the noise characteristics of conventional high frequency bipolar transistors, it is necessary not only to increase fT but also to reduce base resistance. Therefore, in general, the shape of the emitter is miniaturized and the distance between the emitter and the base contact window is reduced.

Usually, as shown in FIG. 1(a), a base layer 3 is formed on the epitaxial layer 2 formed on the whole surface side of the semiconductor substrate l, and then covered with an insulating layer 4, as shown in FIG. 1(b). As shown, the emitter window 5 is made as fine as possible by photolithography.
form. Thereafter, as shown in FIG. 1(c), after the emitter layer 6 was diffused, the base contact window 7 was formed so as to be as close to the emitter window 5 as possible. However, the commonly available photolithography method is currently limited by the wavelength of light, and has a minimum dimension of about 1 μm, and there is also a limit to the accuracy of mask alignment.

Therefore, the dimension of the emitter window 5 in FIG. 1 (bl) is 1 μm.
Moreover, the distance between the emitter window 5 and the base contact window 7 in FIG. 1(c) must be at least 1 μm, which limits the noise characteristics of high-frequency bipolar transistors. That was a big factor.

OBJECT OF THE INVENTION The present invention provides a method for manufacturing a semiconductor device that eliminates the above limitations and further improves noise characteristics.

21 Structure of the Invention The method for manufacturing a semiconductor device according to the present invention includes forming a thin impurity-doped polysilicon layer on a base layer formed directly on a semiconductor substrate or as an epitaxial layer, and a silicon nitride film on this polysilicon layer. After leaving the silicon nitride film in a fine shape by photolithography, the impurity-doped polysilicon was overetched to make it even finer, and the photoresist used in the photolithography was used as a mask to form a nine-paste layer. After implanting ions into the surface with a high S degree and oxidizing the base layer surface and the side surfaces of the impurity-doped polysilicon using the silicon nitride film as a mask, impurities are diffused from the impurity-doped polysilicon to form an emitter layer, and finally, This forms the base contact window. As a result,
It is possible to form an emitter layer with a finer shape than the limit obtained by photolithography, and since the base layer with high concentration of ions implanted extends to the vicinity of the emitter layer, the base contact window is not necessarily formed. The base resistance can be reduced without bringing it close to the emitter, making it possible to improve noise characteristics at high frequencies.

E, Example Next, the present invention will be explained with reference to examples.

FIG. 2 1al to fel are NPs of an embodiment of the present invention.
FIG. 3 is a cross-sectional view showing the order of manufacturing steps for manufacturing an N transistor.

First, as shown in FIG. 2 (al), a P-type substituent layer 3 is formed in the N- epitaxial layer 2 formed on the main surface of the N+ semi-dedicated substrate l by ion implantation or thermal diffusion. Thereafter, a polycrystalline silicon layer 8 containing an N-type impurity such as arsenic or phosphorus having a thickness of about 0x and a silicon nitride film 9 having a thickness of about 100x are formed.Next, as shown in FIG. 2(b), , using normal photolithography technology.
A layer of photoresist lO is left in the shape of a deer with a width of .mu.m, and the silicon nitride film 9 is dry-etched using it as a mask. Next, as shown in FIG. 2 (C1), the polycrystalline silicon layer 8 is over-etched using the silicon nitride film 9 as a mask.
For example, it is processed to about 0.6 μm. Thereafter, using the photoresist lO as a mask, P-type impurities such as boron are ion-implanted at a high concentration to form a low-resistance space region ii.

Next, as shown in FIG. 2(di), using the silicon nitride film 9 as a mask, the exposed base surface and side surfaces of the polycrystalline silicon layer are selectively thermally oxidized at about 2000A to form an oxide film 12.

Subsequently, a polycrystalline silicon layer 8 containing impurities is formed by heat treatment.
An emitter layer 13 is formed by diffusing impurities. Finally, as shown in FIG. 2(e), after removing the silicon nitride film 9 and forming a base contact window, an emitter lead electrode 14 and a base lead electrode 15 are formed using aluminum or the like.

9. Effects of the Invention As described above, the emitter layer 13 shown in FIG. In between, the pace region with relatively high resistivity is about 0.3 μm, and the rest is the high concentration base region 11 with low resistivity, making it a pieborad 2 transistor with significantly reduced base resistance. Has low noise characteristics. In addition, although the example in which the base layer is formed on the epitaxial layer formed on one main surface side of the semiconductor substrate has been described above, the base layer can also be formed directly on the substrate, and the present invention similarly applies to PNPs.
Needless to say, it can be applied to transistors.

[Brief explanation of the drawing]

Figures 1(a) to 1(cl) are cross-sectional views in the order of the manufacturing process of a conventional semiconductor device, and Figures 2(a) to 1(e) are cross-sectional views of an embodiment of the present invention (Km) for explaining the manufacturing process of an NPN transistor. It is a sectional view of process order. ■... Semiconductor substrate, 2... Epitaxial layer, 3... Base layer, 4... Insulating film, 5... Emitter window, 6.13...
Emitter layer, 7...Base contact window, 8.
... Polycrystalline polysilicon, 9... river nitride film%
IO... photoresist), 11... low resistance base region, 12... oxide film, 14... old...
・Emitter extraction electrode, 15...Base extraction electrode. Atsushi 1 Figure (e) (Atsushi 2 Figure

Claims (1)

[Claims] A step of forming a polycrystalline silicon layer on a semiconductor substrate or an epitaxial layer formed on the entire surface side of the substrate, and selectively forming a silicon nitride film on the polycrystalline silicon layer using a photoresist If. a step of over-etching the polycrystalline silicon layer t; and a step of ion-implanting the surface of the fc fin base layer exposed by the over-etching using the photoresist as a mask;
A step of selectively oxidizing the exposed base layer surface and polycrystalline silicon/side surfaces, and a heat treatment to diffuse impurities from the polycrystalline silicon layer into the base layer to form an emitter l-
A method of manufacturing a semiconductor device, comprising: a step of forming a semiconductor device.