JPS60123936A - バッフア記憶制御方式 - Google Patents

バッフア記憶制御方式

Info

Publication number
JPS60123936A
JPS60123936A JP58231104A JP23110483A JPS60123936A JP S60123936 A JPS60123936 A JP S60123936A JP 58231104 A JP58231104 A JP 58231104A JP 23110483 A JP23110483 A JP 23110483A JP S60123936 A JPS60123936 A JP S60123936A
Authority
JP
Japan
Prior art keywords
store
operand
buffer storage
buffer
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58231104A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0526212B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Hirosada Tone
利根　廣貞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58231104A priority Critical patent/JPS60123936A/ja
Priority to CA000468878A priority patent/CA1220284A/en
Priority to AU36267/84A priority patent/AU553039B2/en
Priority to US06/678,684 priority patent/US4713752A/en
Priority to ES538327A priority patent/ES538327A0/es
Priority to DE8484308519T priority patent/DE3478881D1/de
Priority to KR1019840007733A priority patent/KR890005352B1/ko
Priority to EP84308519A priority patent/EP0144249B1/en
Priority to BR8406290A priority patent/BR8406290A/pt
Publication of JPS60123936A publication Critical patent/JPS60123936A/ja
Publication of JPH0526212B2 publication Critical patent/JPH0526212B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3812—Instruction prefetching with instruction modification, e.g. store into instruction stream
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848—Partitioned cache, e.g. separate instruction and operand caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
JP58231104A 1983-12-07 1983-12-07 バッフア記憶制御方式 Granted JPS60123936A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP58231104A JPS60123936A (ja) 1983-12-07 1983-12-07 バッフア記憶制御方式
CA000468878A CA1220284A (en) 1983-12-07 1984-11-28 Buffer storage system
AU36267/84A AU553039B2 (en) 1983-12-07 1984-12-04 Buffer storage system
US06/678,684 US4713752A (en) 1983-12-07 1984-12-05 Buffer storage system
ES538327A ES538327A0 (es) 1983-12-07 1984-12-06 Una instalacion de almacenamiento intermedio en un aparato de tratamiento de datos
DE8484308519T DE3478881D1 (en) 1983-12-07 1984-12-07 Buffer storage system
KR1019840007733A KR890005352B1 (ko) 1983-12-07 1984-12-07 버퍼 기억제어 시스템(buffer storage system)
EP84308519A EP0144249B1 (en) 1983-12-07 1984-12-07 Buffer storage system
BR8406290A BR8406290A (pt) 1983-12-07 1984-12-07 Sistema de memoria intermediaria

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58231104A JPS60123936A (ja) 1983-12-07 1983-12-07 バッフア記憶制御方式

Publications (2)

Publication Number Publication Date
JPS60123936A true JPS60123936A (ja) 1985-07-02
JPH0526212B2 JPH0526212B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-04-15

Family

ID=16918358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58231104A Granted JPS60123936A (ja) 1983-12-07 1983-12-07 バッフア記憶制御方式

Country Status (9)

Country Link
US (1) US4713752A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0144249B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS60123936A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR890005352B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AU (1) AU553039B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
BR (1) BR8406290A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CA (1) CA1220284A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3478881D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
ES (1) ES538327A0 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63177238A (ja) * 1986-10-17 1988-07-21 アムダール　コーポレーション データ処理装置
JPH05324469A (ja) * 1992-04-02 1993-12-07 Nec Corp キャッシュ・メモリを内蔵したマイクロプロセッサ
JP2006318471A (ja) * 2005-05-09 2006-11-24 Sony Computer Entertainment Europe Ltd データ処理におけるメモリキャッシング

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6184753A (ja) * 1984-10-01 1986-04-30 Hitachi Ltd バツフアメモリ
JP2539357B2 (ja) * 1985-03-15 1996-10-02 株式会社日立製作所 デ−タ処理装置
US5349672A (en) * 1986-03-17 1994-09-20 Hitachi, Ltd. Data processor having logical address memories and purge capabilities
JPS6314275A (ja) * 1986-07-04 1988-01-21 Nec Corp ベクトル演算プロセツサのスカラデ−タ演算方式
US4888689A (en) * 1986-10-17 1989-12-19 Amdahl Corporation Apparatus and method for improving cache access throughput in pipelined processors
JPS63240650A (ja) * 1987-03-28 1988-10-06 Toshiba Corp キヤツシユメモリ装置
IT1215539B (it) * 1987-06-03 1990-02-14 Honeywell Inf Systems Memoria tampone trasparente.
GB8817911D0 (en) * 1988-07-27 1988-09-01 Int Computers Ltd Data processing apparatus
US5226169A (en) * 1988-12-30 1993-07-06 International Business Machines Corp. System for execution of storage-immediate and storage-storage instructions within cache buffer storage
EP0389175A3 (en) * 1989-03-15 1992-11-19 Fujitsu Limited Data prefetch system
EP0442116A3 (en) * 1990-02-13 1993-03-03 Hewlett-Packard Company Pipeline method and apparatus
EP0475209A3 (en) * 1990-09-14 1993-09-29 Siemens Aktiengesellschaft Arrangement for the determination of instructions modified by the cpu of a processor
US6378062B1 (en) * 1994-01-04 2002-04-23 Intel Corporation Method and apparatus for performing a store operation
US6651074B1 (en) * 1999-12-20 2003-11-18 Emc Corporation Method and apparatus for storage and retrieval of very large databases using a direct pipe
JP4128551B2 (ja) * 2004-07-29 2008-07-30 富士通株式会社 情報処理装置及びストア命令制御方法
CZ305260B6 (cs) * 2009-06-29 2015-07-08 Indet Safety Systems A.S. Plastový pinový generátor plynů a způsob jeho výroby

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5744279A (en) * 1980-08-28 1982-03-12 Nec Corp Cash memory controller
JPS5829187A (ja) * 1981-08-14 1983-02-21 Nec Corp キヤツシユメモリ制御装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354232A (en) * 1977-12-16 1982-10-12 Honeywell Information Systems Inc. Cache memory command buffer circuit
JPS5687282A (en) * 1979-12-14 1981-07-15 Nec Corp Data processor
US4467414A (en) * 1980-08-22 1984-08-21 Nippon Electric Co., Ltd. Cashe memory arrangement comprising a cashe buffer in combination with a pair of cache memories
JPS5835627A (ja) * 1981-08-26 1983-03-02 Toshiba Corp メモリデ−タ先取り制御方式
US4551799A (en) * 1983-02-28 1985-11-05 Honeywell Information Systems Inc. Verification of real page numbers of stack stored prefetched instructions from instruction cache
US4551797A (en) * 1983-08-31 1985-11-05 Amdahl Corporation Apparatus for reverse translation

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5744279A (en) * 1980-08-28 1982-03-12 Nec Corp Cash memory controller
JPS5829187A (ja) * 1981-08-14 1983-02-21 Nec Corp キヤツシユメモリ制御装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63177238A (ja) * 1986-10-17 1988-07-21 アムダール　コーポレーション データ処理装置
JPH05324469A (ja) * 1992-04-02 1993-12-07 Nec Corp キャッシュ・メモリを内蔵したマイクロプロセッサ
JP2006318471A (ja) * 2005-05-09 2006-11-24 Sony Computer Entertainment Europe Ltd データ処理におけるメモリキャッシング

Also Published As

Publication number Publication date
CA1220284A (en) 1987-04-07
EP0144249B1 (en) 1989-07-05
JPH0526212B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-04-15
EP0144249A3 (en) 1987-05-20
ES8602285A1 (es) 1985-11-01
KR850004821A (ko) 1985-07-27
AU3626784A (en) 1985-06-13
EP0144249A2 (en) 1985-06-12
US4713752A (en) 1987-12-15
BR8406290A (pt) 1985-10-08
KR890005352B1 (ko) 1989-12-23
ES538327A0 (es) 1985-11-01
DE3478881D1 (en) 1989-08-10
AU553039B2 (en) 1986-07-03

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