JPS60123768U - Tape recording modulation circuit - Google Patents
Tape recording modulation circuitInfo
- Publication number
- JPS60123768U JPS60123768U JP1182584U JP1182584U JPS60123768U JP S60123768 U JPS60123768 U JP S60123768U JP 1182584 U JP1182584 U JP 1182584U JP 1182584 U JP1182584 U JP 1182584U JP S60123768 U JPS60123768 U JP S60123768U
- Authority
- JP
- Japan
- Prior art keywords
- tape recording
- modulation circuit
- recording modulation
- signal
- data signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
、 、第１甲は従来のテープ録音変調回路を示す図
、−
第２図はそのタイミングチャート、第３図は巳の考案の
一実施例を示す回路図、第４図はそのタイ７ 図中１．
１は分周索子、２はデータ送信素子、４．５ｃＥアンド
素子、６はノア素子、７！８は抵 −抗器、９はコ
ンデンサ、１０は出力端子、３０は′ ラリツブフロッ
プである。なお、図中の同一符号は〒、−またｃ−ｒｍ
当部ｉを示す。 −−
ル−−−偶 第４図 〜” −ブー 、−−−１」
＋＋１, , Part 1 is a diagram showing a conventional tape recording modulation circuit, - Figure 2 is its timing chart, Figure 3 is a circuit diagram showing an embodiment of Mi's invention, and Figure 4 is its tie 7. 1.
1 is a frequency divider element, 2 is a data transmitting element, 4.5cE AND element, 6 is a NOR element, 7!8 is a resistor, 9 is a capacitor, 10 is an output terminal, and 30 is a laritub flop. In addition, the same symbols in the figure are 〒, - and c-rm.
Indicates part i. −− Ru−−−Even Figure 4 ~”−Boo,−−−1” ++1
Claims (1)
変調し、その変調信号をテープ録音信号へするテープ録
音変調回路において、前記テープ録音信号゛ と前
記データ信号との同期をとる手段を設けたこ６、
とを特徴とするテープ録音変調回路。44159. In a tape recording modulation circuit that modulates a data signal of "2" to a frequency of n:1 and converts the modulated signal into a tape recording signal, a means for synchronizing the tape recording signal and the data signal is provided. 6,
A tape recording modulation circuit characterized by.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1182584U JPS60123768U (en) | 1984-01-31 | 1984-01-31 | Tape recording modulation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1182584U JPS60123768U (en) | 1984-01-31 | 1984-01-31 | Tape recording modulation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60123768U true JPS60123768U (en) | 1985-08-21 |
Family
ID=30494309
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1182584U Pending JPS60123768U (en) | 1984-01-31 | 1984-01-31 | Tape recording modulation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60123768U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58120353A (en) * | 1982-01-13 | 1983-07-18 | Fujitsu Ltd | Msk modulating system |
| JPS58184855A (en) * | 1982-04-22 | 1983-10-28 | Nec Corp | Fsk transmitter |
-
1984
- 1984-01-31 JP JP1182584U patent/JPS60123768U/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58120353A (en) * | 1982-01-13 | 1983-07-18 | Fujitsu Ltd | Msk modulating system |
| JPS58184855A (en) * | 1982-04-22 | 1983-10-28 | Nec Corp | Fsk transmitter |
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