JPS60142575U - burst gate circuit - Google Patents

burst gate circuit

Info

Publication number
JPS60142575U
JPS60142575U JP2939784U JP2939784U JPS60142575U JP S60142575 U JPS60142575 U JP S60142575U JP 2939784 U JP2939784 U JP 2939784U JP 2939784 U JP2939784 U JP 2939784U JP S60142575 U JPS60142575 U JP S60142575U
Authority
JP
Japan
Prior art keywords
transistor
gate circuit
burst gate
circuit
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2939784U
Other languages
Japanese (ja)
Inventor
野村 正幸
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP2939784U priority Critical patent/JPS60142575U/en
Publication of JPS60142575U publication Critical patent/JPS60142575U/en
Pending legal-status Critical Current

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  • Processing Of Color Television Signals (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

゛  第1図は従来のパーストゲート回路の回路図、第
2図は同従来回路の動作説明のための信号波形図、第3
図は本考案の1実施例の回路図、第4図は同実施例の動
作説明のための信号波形図である。 1・・・パーストゲート用トランジスタ、2.4・・・
入力端子、7・・・抵抗、8・・・出力端子、9・・・
コイ −・ −−ル。      、 ′
゛ Fig. 1 is a circuit diagram of a conventional burst gate circuit, Fig. 2 is a signal waveform diagram for explaining the operation of the conventional circuit, and Fig. 3 is a circuit diagram of a conventional burst gate circuit.
The figure is a circuit diagram of an embodiment of the present invention, and FIG. 4 is a signal waveform diagram for explaining the operation of the embodiment. 1... Burst gate transistor, 2.4...
Input terminal, 7...Resistor, 8...Output terminal, 9...
Koi −・ −−le. , ′

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] バニストゲート用トランジスタのコレクタに搬送色信号
を印加し、同トランジスタのベースにパーストゲートパ
ルスを印加し、同トランジスタのエミッタより搬送色信
号中に含まれているバースト信号を分離導出する9もの
において1.前記トランジ子夕のエミッタ回路に負荷と
して抵抗とコイルの並列回路を挿入したことを特徴とす
るバニえトゲiト回路。              
 ゛
A carrier color signal is applied to the collector of a banist gate transistor, a burst gate pulse is applied to the base of the transistor, and a burst signal contained in the carrier color signal is separated and derived from the emitter of the transistor.1. A vanity gate circuit characterized in that a parallel circuit of a resistor and a coil is inserted as a load in the emitter circuit of the transistor.
JP2939784U 1984-02-28 1984-02-28 burst gate circuit Pending JPS60142575U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2939784U JPS60142575U (en) 1984-02-28 1984-02-28 burst gate circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2939784U JPS60142575U (en) 1984-02-28 1984-02-28 burst gate circuit

Publications (1)

Publication Number Publication Date
JPS60142575U true JPS60142575U (en) 1985-09-20

Family

ID=30528165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2939784U Pending JPS60142575U (en) 1984-02-28 1984-02-28 burst gate circuit

Country Status (1)

Country Link
JP (1) JPS60142575U (en)

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