JPS58186632U - Waveform shaping circuit - Google Patents

Waveform shaping circuit

Info

Publication number
JPS58186632U
JPS58186632U JP8481782U JP8481782U JPS58186632U JP S58186632 U JPS58186632 U JP S58186632U JP 8481782 U JP8481782 U JP 8481782U JP 8481782 U JP8481782 U JP 8481782U JP S58186632 U JPS58186632 U JP S58186632U
Authority
JP
Japan
Prior art keywords
waveform shaping
shaping circuit
transistors
emitters
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8481782U
Other languages
Japanese (ja)
Other versions
JPH0139013Y2 (en
Inventor
浩 高橋
田上 博康
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP8481782U priority Critical patent/JPS58186632U/en
Publication of JPS58186632U publication Critical patent/JPS58186632U/en
Application granted granted Critical
Publication of JPH0139013Y2 publication Critical patent/JPH0139013Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Picture Signal Circuits (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の波形整形回路の回路図、第2図は本考案
の一実施例を示した回路図、第3図a。 b、  c、  d、  eは本考案の効果を説明する
ための図である。 図において、1・・・・・・入力端子、2.3・・・・
・・トランジスタ、4・・・・・・出力端子、5・・・
・・・抵抗器、6・・・・・・ブランキング信号入力端
子。
FIG. 1 is a circuit diagram of a conventional waveform shaping circuit, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3a. b, c, d, and e are diagrams for explaining the effects of the present invention. In the figure, 1...input terminal, 2.3...
...Transistor, 4...Output terminal, 5...
...Resistor, 6...Blanking signal input terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1対のトランジスタのエミッタどうしを接続しエミッタ
側を共通インピーダンス素子でドライブすることにより
、前記トランジスタの1方のベースに入力される映像信
号を、前記トランジスタの他方のベースに入力される電
圧によりクリップされた信号を前記トランジスタの共通
エミッタより取り出す波形整形回路において、前記波形
整形回路のクリップ電圧にブランキング信号を重畳した
ことを特徴とする波形整形回路。
By connecting the emitters of a pair of transistors and driving the emitters with a common impedance element, the video signal input to the base of one of the transistors can be clipped by the voltage input to the base of the other transistor. 1. A waveform shaping circuit for extracting a signal from a common emitter of the transistors, characterized in that a blanking signal is superimposed on a clip voltage of the waveform shaping circuit.
JP8481782U 1982-06-08 1982-06-08 Waveform shaping circuit Granted JPS58186632U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8481782U JPS58186632U (en) 1982-06-08 1982-06-08 Waveform shaping circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8481782U JPS58186632U (en) 1982-06-08 1982-06-08 Waveform shaping circuit

Publications (2)

Publication Number Publication Date
JPS58186632U true JPS58186632U (en) 1983-12-12
JPH0139013Y2 JPH0139013Y2 (en) 1989-11-21

Family

ID=30093739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8481782U Granted JPS58186632U (en) 1982-06-08 1982-06-08 Waveform shaping circuit

Country Status (1)

Country Link
JP (1) JPS58186632U (en)

Also Published As

Publication number Publication date
JPH0139013Y2 (en) 1989-11-21

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