JPS5939542U - buffer circuit - Google Patents
buffer circuitInfo
- Publication number
- JPS5939542U JPS5939542U JP13374782U JP13374782U JPS5939542U JP S5939542 U JPS5939542 U JP S5939542U JP 13374782 U JP13374782 U JP 13374782U JP 13374782 U JP13374782 U JP 13374782U JP S5939542 U JPS5939542 U JP S5939542U
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- input
- buffer circuit
- bases
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のバッファ回路を示す接続図、第２図は本
考案によるバッファ回路の一実施例を示す接続図、第３
図は本考案の他の実施例を示す接続図である。
１・・・バッファ回路、３．４・・・入力側トランジス
タ、５，７・・・電流源、９，１．０・・・出力側トラ
ンジスタ、１５・・・コンデンサ、１６・・・電流調整
用抵抗。
補正 昭５８．２．１８
実用新案登録請求の範囲を次のように補正する。
Ｏ実用新案登録請求の範囲
コンプリメンタリなバイポーラトランジスタでなりかつ
共通に接続され−たベースに入力信号を受ける第１及び
第２の入力画トランジスタをエミッタホロア接続し、上
記第１及び第２の入力側トランジスタのエミッタに対し
てエミッタホロア接続してなるコンプリメンタリなバイ
ポーラトランジスタでなる第１及び第２の出力側ト）ン
ジスタのベースをそれぞれ接続すると共に、上記第１及
び第２の出力側トランジスタのエミッタを共通に接続し
て出力信号を送出し、上記第１及び第２の入力側トラン
ジスタのエミッタと上記第１及び第２の出力側トランジ
スタのベースとの接続点にそれぞれ接−した第１及び第
２の電流源によって駆動するようになされたバッファ回
路において、上記第１及び第２の出力側トランジスタの
ベース間にコンデンサを接続して上記第１（又は第２）
の入力側トランジスタがオン動作したとき当該オン動作
し ′た入力側トランジスタを介しさらに上記コンデ
ンサを介して上記第２（又は第１）の出力側トランジス
タに過渡的に十分大きなペニス電流を流すようにしたこ
とを特徴とするバッファ回路。Fig. 1 is a connection diagram showing a conventional buffer circuit, Fig. 2 is a connection diagram showing an embodiment of the buffer circuit according to the present invention, and Fig. 3 is a connection diagram showing an embodiment of the buffer circuit according to the present invention.
The figure is a connection diagram showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Buffer circuit, 3.4... Input side transistor, 5, 7... Current source, 9, 1.0... Output side transistor, 15... Capacitor, 16... Current adjustment Resistance for use. Amendment February 18, 1982 The scope of claims for utility model registration is amended as follows. Utility Model Registration Claims First and second input transistors which are complementary bipolar transistors and whose commonly connected bases receive an input signal are emitter-follower connected, and the first and second input side transistors are connected as emitter followers. The bases of first and second output side transistors, which are complementary bipolar transistors formed by emitter follower connection, are respectively connected to the emitter of the first and second output side transistors, and the emitters of the first and second output side transistors are connected in common. first and second currents connected to the connection points between the emitters of the first and second input transistors and the bases of the first and second output transistors, respectively; In the buffer circuit configured to be driven by a source, a capacitor is connected between the bases of the first and second output side transistors, and the first (or second)
When the input transistor is turned on, a sufficiently large penis current is caused to flow transiently to the second (or first) output transistor through the turned-on input transistor and further through the capacitor. A buffer circuit characterized by:
Claims (1)
共通に接続されたベースに入力信号を受ける第１及び第
２の入力側トランジスタをエミッタホロア接続し、上記
第１及び第２の入力側トランジスタのエミッタに対して
エミッタホロア接続してなるコンプリメンタリなバイポ
ーラトランジスタでなる第１及び第２の出力側トランジ
スタのベースをそれぞれ接続すると共に、上記第１及び
第２の出力側トランジスタのエミッタを共通に接続して
出力信号を送出し、上記第１及び第２の入力側トランジ
スタのエミッタと上記第１及び第２の出力側トランジス
タのベースとの接続点にそれぞれ接続した第１及び第２
の電流源によって駆動するようになされたビデオテープ
レコーダのビデオ信号処理回路のバッファ回路において
、上記第１及び第２の出力側トランジスタのベース間に
コンデンサを接続して上記第１（又は第２）の入力側ト
ランジスタがオン動作したとき当該オン動作した入力側
トランジスタを介しさらに上記コンデンサを介して上記
第２（又は第１）の出力側トランジスタに過渡的に十分
大きなベース電流を流すようにしたことを特徴とするバ
ッファ回路。The first and second input side transistors, which are complementary bipolar transistors and receive an input signal to their commonly connected bases, are connected as emitter followers, and the emitters of the first and second input side transistors are connected as emitter followers. The bases of the first and second output side transistors, each of which is a complementary bipolar transistor, are connected to each other, and the emitters of the first and second output side transistors are connected in common to send out an output signal. First and second transistors connected to the connection points between the emitters of the first and second input transistors and the bases of the first and second output transistors, respectively.
In the buffer circuit of the video signal processing circuit of a video tape recorder, which is driven by a current source of When the input side transistor is turned on, a sufficiently large base current is caused to flow transiently to the second (or first) output side transistor through the turned on input side transistor and further through the capacitor. A buffer circuit featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13374782U JPS5939542U (en) | 1982-09-02 | 1982-09-02 | buffer circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13374782U JPS5939542U (en) | 1982-09-02 | 1982-09-02 | buffer circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5939542U true JPS5939542U (en) | 1984-03-13 |
Family
ID=30301590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13374782U Pending JPS5939542U (en) | 1982-09-02 | 1982-09-02 | buffer circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5939542U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS499051B1 (en) * | 1970-12-22 | 1974-03-01 | ||
| JPS5090277A (en) * | 1973-12-11 | 1975-07-19 | ||
| JPS5161254A (en) * | 1974-11-25 | 1976-05-27 | Sharp Kk | SHUTSURY OKUKAIRO |
-
1982
- 1982-09-02 JP JP13374782U patent/JPS5939542U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS499051B1 (en) * | 1970-12-22 | 1974-03-01 | ||
| JPS5090277A (en) * | 1973-12-11 | 1975-07-19 | ||
| JPS5161254A (en) * | 1974-11-25 | 1976-05-27 | Sharp Kk | SHUTSURY OKUKAIRO |
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