JPS5883992U - Phase synchronization control circuit - Google Patents
Phase synchronization control circuitInfo
- Publication number
- JPS5883992U JPS5883992U JP17803381U JP17803381U JPS5883992U JP S5883992 U JPS5883992 U JP S5883992U JP 17803381 U JP17803381 U JP 17803381U JP 17803381 U JP17803381 U JP 17803381U JP S5883992 U JPS5883992 U JP S5883992U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- phase synchronization
- synchronization control
- control circuit
- controlled oscillation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を示すブロック図、第2図は
第1図における周波数制限回路部の詳細を示す構成図、
第3図は周波数制限回路部の周波数制限特性を示す図で
ある。
1は電圧制御発振回路、2は周波数分周およびパルス幅
変調回路、3は逆変換回路、4はフィルタ回路、5i交
流電圧出力、6は位相差検出回路、7は位相基準信号、
8は増幅および補償回路、9は周波数制限回路、91は
周波数制限抵抗器、92は最高周波数制限ダイオード、
93.94は最高周波数制限設定抵抗器、95は最低周
波数制限ダイオード、96.97は最低周波数制限抵抗
器。FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a configuration diagram showing details of the frequency limiting circuit section in FIG. 1,
FIG. 3 is a diagram showing the frequency limiting characteristics of the frequency limiting circuit section. 1 is a voltage controlled oscillation circuit, 2 is a frequency division and pulse width modulation circuit, 3 is an inverse conversion circuit, 4 is a filter circuit, 5i is an AC voltage output, 6 is a phase difference detection circuit, 7 is a phase reference signal,
8 is an amplification and compensation circuit, 9 is a frequency limiting circuit, 91 is a frequency limiting resistor, 92 is the highest frequency limiting diode,
93.94 is the highest frequency limit setting resistor, 95 is the lowest frequency limit diode, and 96.97 is the lowest frequency limit resistor.
Claims (1)
、逆変換回路、フィルタ回路、交流電圧出力、位相差検
出回路、位相基準信号、増幅および補償回路から構成さ
れる位相同期制御回路において、増幅および補償回路と
電圧制御発振回路間に、該電圧制御発振回路の制御電圧
を制限するような周波数制限回路を挿入してなる位相同
期制御回路。Amplification and A phase synchronization control circuit comprising a frequency limiting circuit that limits the control voltage of the voltage controlled oscillation circuit between the compensation circuit and the voltage controlled oscillation circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17803381U JPS5883992U (en) | 1981-11-30 | 1981-11-30 | Phase synchronization control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17803381U JPS5883992U (en) | 1981-11-30 | 1981-11-30 | Phase synchronization control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5883992U true JPS5883992U (en) | 1983-06-07 |
Family
ID=29972457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17803381U Pending JPS5883992U (en) | 1981-11-30 | 1981-11-30 | Phase synchronization control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5883992U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5653584A (en) * | 1979-10-09 | 1981-05-13 | Toshiba Corp | Control circuit of synchronized osscillator which controls inverter |
-
1981
- 1981-11-30 JP JP17803381U patent/JPS5883992U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5653584A (en) * | 1979-10-09 | 1981-05-13 | Toshiba Corp | Control circuit of synchronized osscillator which controls inverter |
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