JPS60119175U

JPS60119175U - Video signal processing device

Info

Publication number: JPS60119175U
Application number: JP1984005090U
Authority: JP
Inventors: 笹村　晃平; 徳光　淳亮
Original assignee: 日本ビクター株式会社
Priority date: 1984-01-18
Filing date: 1984-01-18
Publication date: 1985-08-12
Also published as: JPH03789Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案装置の一実施例を示すブロック系統図、
第２図は第１図図示ブロック系統中の要部の一実施例を
示す回路系統図、第３図Ａ〜Ｉは夫々第２区の動作説明
用信号波形図、第４図Ａ〜Ｃは夫々本考案装置の他の要
部の動作説明用信号波形図である。１・・・再生複合カラー映像信号入力端子、３・・・Ａ
Ｄ変換器、４・・・パスラインコントローラ、５゜８・
・・タイミング制御回路、６・・・制御信号入力端子、
７ａ〜７ｃ・・・出力端子、９・・・メモリ、１０・・
・アドレス信号発生回路、１１・・・ＤＡ変換器、１３
・・・再生複合カラー映像信号出力端子、１５．２５・
・・単安定マルチバイブレーク、２０・・・Ｊ−に７１
Ｊツブフロツプ（Ｊ−ＫＦ、Ｆ）、２２．２３・・・デ
ィジタルビチオ信号入力端子、２４．２７・・・水平同
期共ルス抽出回路、２６・・・Ｄ型フリップフロップ、
２９・・・シフトレジスタ、３０・・・クロックパルス
入力端子、３１・・・マルチプレクサ、３５・・・垂直
同期パルス抽出回路。FIG. 1 is a block system diagram showing an embodiment of the device of the present invention;
FIG. 2 is a circuit system diagram showing an embodiment of the main part in the block system shown in FIG. FIG. 7 is a signal waveform diagram for explaining the operation of other main parts of the device of the present invention. 1... Reproduction composite color video signal input terminal, 3...A
D converter, 4...Pass line controller, 5°8.
...Timing control circuit, 6...Control signal input terminal,
7a-7c...output terminal, 9...memory, 10...
・Address signal generation circuit, 11...DA converter, 13
...Reproduction composite color video signal output terminal, 15.25.
・Monostable multi-bi break, 20...71 to J-
J tube flop (J-KF, F), 22.23...Digital bit signal input terminal, 24.27...Horizontal synchronization pulse extraction circuit, 26...D type flip-flop,
29... Shift register, 30... Clock pulse input terminal, 31... Multiplexer, 35... Vertical synchronization pulse extraction circuit.

Claims

[Scope of utility model registration request]

The speed is different from that during recording, and for a section in which the playback signal level is smaller than a certain value in any one track scanning period, it is higher than the certain value in the corresponding section one track scanning period before. a layer converter for converting into a digital video signal a composite video signal reproduced from a recording medium that is run at a speed such that a playback signal of the level is obtained, or is stopped running; a memory having a capacity capable of storing data, a switch means for selectively outputting either the output signal of the AD converter or the read output signal of the memory; During a small period and a predetermined period around it or a period shorter than that, the switch means uses a digital video signal of a corresponding period one track scanning period ago read from the memory instead of the output signal of the layer converter. and output the selection.
control means for causing the switch means to selectively output the output signal of the layer converter and to write the output signal of the layer converter into the memory during periods other than the above-mentioned period; The relative phase lead/lag between the synchronous signals in the surface output signal of the converter is detected, and the read timing of the memory is controlled so that these phases become small, so that the detected phases are substantially matched. video signal processing comprising: readout control means for causing the control means to terminate the readout operation of the memory even within the certain period; and output means for obtaining a reproduced composite video signal from the output signal of the switch means; Device.