JP3119268B2 - Data processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processor for processing video data and audio data.

[0002]

2. Description of the Related Art In recent years, in a video recording / reproducing apparatus, a so-called VTR, digital signal processing has been widely used for various image processing such as noise reduction, and a digital recording VTR has also been proposed. FIG. 2 shows a conventional digital VT.
1 shows a basic configuration diagram of R. FIG. 2A shows a configuration block diagram of a recording system, and FIG. 2B shows a configuration block diagram of a reproduction system. An analog video signal is input to the video input terminal 10,
An analog audio signal is input to the audio input terminal 12. A
The / D converters 14 and 16 digitize the analog signals at the input terminals 10 and 12, respectively, and the output data is temporarily stored in the memory 18. Data is interleaved as necessary on the memory 18. Encoder 20
Reads out the video data and the audio data stored in the memory 18 and performs predetermined recording processing such as blocking, error correction coding, and modulation. The output of the encoder 20 is amplified by a recording amplifier 22 and recorded on a magnetic tape 26 by a magnetic head 24.

At the time of reproduction, the recording signal on the magnetic tape 26 is electromagnetically converted by the magnetic head 24, and the output of the magnetic head 24 is amplified by the reproduction amplifier 28 and applied to the decoder 30. The decoder 30 performs a reproduction process reverse to that of the encoder 20, and the reproduced video data and the reproduced audio data are written into the memory 32. If data interleaving is performed during recording, deinterleaving is performed by operating the address of the memory 32. Memory 3
The reproduced video data and the reproduced audio data stored in 2 are read out, converted into analog signals by D / A converters 34 and 36, respectively, and output from output terminals 38 and 40 to the outside.

The memories 18 and 32 usually have a storage capacity for one frame (that is, two fields). FIG. 3 shows a circuit configuration for selecting writing and reading of the memories 18 and 32. 42A and 42B are field
A write switch 44 connected to the write side of the memories 42A and 42B;
The read switch 46 connected to the read side is controlled to be connected to the memories 42A and 42B opposite to each other, so that when writing to one of the memories 42A and 42B, reading can be performed from the other. . In particular, if the recording process or the reproducing process can be completed within one field time by switching the switches 44 and 46 on a field basis, the video can be recorded and reproduced in real time.

[0005]

However, since the video data is separated by the vertical blanking period, the switches 44 and 46 may be switched to the vertical blanking period, but the audio data is also continuous data. So simply switch 4 during the vertical blurring period of the video
Switching between 4, 46 may result in the loss of some of the audio data.

FIG. 4 shows a timing chart of video data and audio data. FIG. 4A shows a field signal, and FIG.
Indicates video data, and (3) indicates audio data. For example,
In the vertical blanking period between the video data D-1 and D-2, there is audio data A-1, and while the memory is being written in the video system, the memory is being read in the audio system.
There is an inconvenience that the memory is being read in the video system but the memory is being written in the audio system. Since the field signal shown in FIG. 4A corresponds to the video data synchronization signal shown in FIG. 4B, the transition point of the field signal is synchronized with the video data. However, the field signal is asynchronous with the audio data.

To cope with this, there is a measure to temporarily hold audio data using, for example, a FIFO (first in first out) memory or the like, and to synchronize the timing with video data as shown in FIG. Conceivable. But,
This configuration has disadvantages such as an increase in cost and an increase in mounting area due to the FIFO memory.

[0008] The present invention is, data to solve such problems
The purpose of the present invention is to present a data processing device .

[0009]

A data processing apparatus according to the present invention has an input means for inputting video data and audio data, and a plurality of memory means, wherein the video data and the audio data input by the input means are provided. A storage unit for storing
Among the plurality of memory means, selection means for selecting a memory means to which data is to be written, in the vertical synchronizing period of the input image data, the input voice data Sa
Control means for controlling the selection means so as to switch the memory means to which the audio data is to be written at a timing corresponding to the sample break .

[0010]

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Reference numeral 50 denotes an input terminal for an analog video signal, and 52 denotes an input terminal for an analog audio signal.
Are input to the A / D converter 54,
The signal is converted into a digital signal by 56. A / D converter 5
Output data 4 and 56 are multiplexed by a video / audio switch 58 and applied to a write switch 60.

As will be described later in detail, the write switch 60
Via the two field memories 6 of the memory circuit 62
Data is written to one of 2A and 62B. The written field memories 62A and 62B are switched for each field of the video signal. Data is read from a field memory 62B (or 62A) different from the field memory 62A (or 62B) in which the data is written, and applied to the encoder 66 via the read switch 64. That is, when the write switch 60 is connected to the contact a, the read switch 64 is connected to the contact b, and when the write switch 60 is connected to the contact b, the read switch 64 is connected to the contact a. The encoder 66 performs processes such as error correction coding and synchronous blocking, and its output is amplified by a recording amplifier 68 and recorded on a magnetic tape 72 by a magnetic head 70.

A switch control circuit 74 controls switching of the write switch 60 and the read switch 64. The switch control circuit 74 includes a blanking signal 76 (a signal indicating a blanking period) from the video A / D converter 54 and an audio system. A /
Audio sampling clock 78 from D converter 56
, The write switch 60 and the read switch 6
4 to generate a write / read control signal 80 for controlling switching. FIG. 5 shows a timing diagram of the video system and the audio system. 5A shows a video sampling clock, FIG. 5B shows video data (output of the A / D converter 54), FIG. 5C shows an audio sampling clock 78, and FIG. Data (output of the A / D converter 56), (5) is a blanking signal 76, and (6) is a write / read control signal 80 for controlling the write switch 60 and the read switch 64.

The switch control circuit 74 is specifically composed of a D flip-flop. A blanking signal 76 is input to a D input terminal of the switch control circuit 74. A sampling clock of an audio system is input to a clock input terminal. It becomes the control signal 80. As a result, the write / read switching signal 80 synchronized with the first audio sampling clock in the blanking period is obtained. Therefore, there is no problem for the video system because the switching is performed within the blanking period, and for the audio system, there is no problem since it matches the break of the audio data.

[0016]

As can be easily understood from the above description, according to the present invention, video data and audio data can be stored in the same memory at appropriate delimiters without adding a buffer memory or the like. Can be read on top.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of an embodiment of the present invention.

FIG. 2 is a configuration block diagram of a recording system (A) and a reproduction system (B) of a conventional example.

FIG. 3 is a configuration block diagram of a conventional switching circuit for writing and reading memory.

FIG. 4 is a timing chart of a conventional memory write.

FIG. 5 is a timing chart of memory write control according to the present embodiment.

[Explanation of symbols]

50: video signal input terminal 52: audio signal input terminal 5
4, 56: A / D converter 58: video / audio switch 60: write switch 62: memory circuit 62A,
62B: Field memory 64: Readout switch 66: Encoder 68: Recording amplifier 70: Magnetic head 72: Magnetic tape 74: Switch control circuit 7
6: Blanking signal 78: Audio sampling clock 80: Write / read control signal

Claims (2)

(57) [Claims] An input unit for inputting video data and audio data; a storage unit having a plurality of memory units for storing the video data and audio data input by the input unit; Selecting means for selecting a memory means to which data is to be written, and writing the audio data at a timing corresponding to a break of a sample of the input audio data in a vertical synchronization period of the input video data. Control means for controlling the selection means to switch the memory means to be switched. 2. A further recording and processing means for performing predetermined processing suitable for recording the video data and audio data read from the storage unit, the video data and audio data outputted from said processing means 2. The data processing apparatus according to claim 1, further comprising a recording unit that records on a medium.