JPS60118967A - マルチプロセツサシステム - Google Patents

マルチプロセツサシステム

Info

Publication number
JPS60118967A
JPS60118967A JP58226440A JP22644083A JPS60118967A JP S60118967 A JPS60118967 A JP S60118967A JP 58226440 A JP58226440 A JP 58226440A JP 22644083 A JP22644083 A JP 22644083A JP S60118967 A JPS60118967 A JP S60118967A
Authority
JP
Japan
Prior art keywords
processor
slave
memory block
data
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58226440A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0120459B2 (enrdf_load_stackoverflow
Inventor
Haruyoshi Kakiya
垣谷　治善
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP58226440A priority Critical patent/JPS60118967A/ja
Publication of JPS60118967A publication Critical patent/JPS60118967A/ja
Publication of JPH0120459B2 publication Critical patent/JPH0120459B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP58226440A 1983-11-30 1983-11-30 マルチプロセツサシステム Granted JPS60118967A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58226440A JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58226440A JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Publications (2)

Publication Number Publication Date
JPS60118967A true JPS60118967A (ja) 1985-06-26
JPH0120459B2 JPH0120459B2 (enrdf_load_stackoverflow) 1989-04-17

Family

ID=16845138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58226440A Granted JPS60118967A (ja) 1983-11-30 1983-11-30 マルチプロセツサシステム

Country Status (1)

Country Link
JP (1) JPS60118967A (enrdf_load_stackoverflow)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4887741A (enrdf_load_stackoverflow) * 1972-02-18 1973-11-17
JPS55115142A (en) * 1979-02-24 1980-09-04 Fujitsu Ltd Data processing system
JPS55134442A (en) * 1979-04-04 1980-10-20 Hitachi Ltd Data transfer unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4887741A (enrdf_load_stackoverflow) * 1972-02-18 1973-11-17
JPS55115142A (en) * 1979-02-24 1980-09-04 Fujitsu Ltd Data processing system
JPS55134442A (en) * 1979-04-04 1980-10-20 Hitachi Ltd Data transfer unit

Also Published As

Publication number Publication date
JPH0120459B2 (enrdf_load_stackoverflow) 1989-04-17

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