JPS60116253U - Circuit element mounting structure - Google Patents
Circuit element mounting structureInfo
- Publication number
- JPS60116253U JPS60116253U JP1983122566U JP12256683U JPS60116253U JP S60116253 U JPS60116253 U JP S60116253U JP 1983122566 U JP1983122566 U JP 1983122566U JP 12256683 U JP12256683 U JP 12256683U JP S60116253 U JPS60116253 U JP S60116253U
- Authority
- JP
- Japan
- Prior art keywords
- circuit element
- element mounting
- circuit
- mounting structure
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図AないしDは、それぞれ従来の電子回路モジュー
ル積層結合体の一例を示す左側面図、一部切截正面図、
右側面図及び横断面図、第2図は、従来の電子回路モジ
ュールの要部を示す斜視図、第3図は、従来の回路素子
の実装構造の他の例を示す要部斜視図、第4,5図は、
それぞれ第3図に示した回路素子の実装方法を説明する
ための側面図、第6図AないしDは、それぞれ本考案の
回路素子の実装構造の一実施例を示す左側面図、正面図
、右側面図及び平面図、第7図A、 Bは、それぞれ第
6図AないしDに示した電子回路モジュールの実装方法
を説明するための斜視図、第8図は、本考案の回路素子
の実装構造に適用したリードフレームの一実施例を示す
要部斜視図、第9図AないしCは、それぞれ第8図に示
したリードフレームの製造方法の一実施例を説明するた
めの要部斜視図、第10図AないしCは、第8図に示し
たリードフレームの変形例の製造方法を説明するための
要部斜視図、第11図は、本考案の回路素子の実装構造
の一変形例を示す要部断面図、第12図A、 Bは、そ
れぞれ第11図に示し、た回路素子の実装方法を説明す
るための斜視図、第13図は、本考案の回路素子の実装
構造の他の変形例を示す要部■44図、第14図A、
Bは、それぞれ第13図に示した回路素子の実装方法を
説明するための断面図である。
1・・・・・・ICチップ、2・・・・・・チップ抵抗
、3・・・・・・チップコンデンサ、11・・・・・・
回路素子、21・・・・・・導電性接着剤、31,41
,51・・・・・・リードフレーム、31a・・・・・
・回路素子装着部分、31b・・・・・・接続端子部分
、31c・・・、・・・コネクタビン部分、34.35
.36・・・・・・電子回路モジュール、37・・・・
・・電子回路モジュール積層結合体。
37、.31b
−r−−−−)−−
1b1A to 1D are a left side view, a partially cutaway front view, and a partially cutaway front view showing an example of a conventional electronic circuit module stacked assembly, respectively;
2 is a perspective view showing the main parts of a conventional electronic circuit module; FIG. 3 is a perspective view of the main parts showing another example of a conventional circuit element mounting structure; Figures 4 and 5 are
FIG. 3 is a side view for explaining the mounting method of the circuit element shown in FIG. A right side view and a plan view, FIGS. 7A and 7B are perspective views for explaining the mounting method of the electronic circuit module shown in FIGS. 6A to D, respectively, and FIG. 8 is a perspective view of the circuit element of the present invention. A perspective view of a main part showing an example of a lead frame applied to a mounting structure, and FIGS. 9A to 9C are perspective views of main parts for explaining an example of a method for manufacturing the lead frame shown in FIG. 8, respectively. 10A to 10C are perspective views of essential parts for explaining the manufacturing method of the modification of the lead frame shown in FIG. 8, and FIG. 11 is a modification of the circuit element mounting structure of the present invention. FIGS. 12A and 12B are cross-sectional views of main parts showing an example, and FIG. 13 is a perspective view for explaining the mounting method of the circuit element shown in FIG. Main part showing other modifications of Fig. 44, Fig. 14A,
B is a cross-sectional view for explaining a method of mounting the circuit elements shown in FIG. 13, respectively. 1...IC chip, 2...chip resistor, 3...chip capacitor, 11...
Circuit element, 21... Conductive adhesive, 31, 41
, 51...Lead frame, 31a...
・Circuit element mounting part, 31b...Connection terminal part, 31c...,...Connector bin part, 34.35
.. 36...Electronic circuit module, 37...
...Electronic circuit module laminate assembly. 37,. 31b -r----)-- 1b
Claims (1)
路素子と、該回路素子が実装され、あらかじめ形成され
た回路パターンに従って該回路素子どうしを電気的に接
続するリードフレームとからなり、該リードフレームは
、′電子回路モジュールごとに回路素子を結集させて装
着される複数の回路素子装着部分と、隣接する該回路素
子装着部分どうしを接続する可撓性の接続端子部分が一
体形成されてなる回路素子の実装構造。It consists of a circuit element such as an IC chip, a chip resistor, or a chip capacitor, and a lead frame on which the circuit element is mounted and which electrically connects the circuit elements according to a pre-formed circuit pattern. Mounting of a circuit element in which a plurality of circuit element mounting portions are assembled and mounted in each electronic circuit module, and a flexible connecting terminal portion for connecting adjacent circuit element mounting portions is integrally formed. structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983122566U JPS60116253U (en) | 1983-08-06 | 1983-08-06 | Circuit element mounting structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983122566U JPS60116253U (en) | 1983-08-06 | 1983-08-06 | Circuit element mounting structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60116253U true JPS60116253U (en) | 1985-08-06 |
Family
ID=30681321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983122566U Pending JPS60116253U (en) | 1983-08-06 | 1983-08-06 | Circuit element mounting structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60116253U (en) |
-
1983
- 1983-08-06 JP JP1983122566U patent/JPS60116253U/en active Pending
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