JPS60111414A - Plasmic vapor-phase reaction method and manufacturing equipment thereof - Google Patents

Abstract

PURPOSE:To form a film of uniform thickness by a method wherein a plasma confinement space is provided in a reaction chamber using an insulator, and a pair of electric fields are provided in the space using a paralleled flat-plate electrode. CONSTITUTION:The multichamber system plasmic vapor-phase reaction device, having two reaction chambers I and III of three reaction systems formed by laminating semiconductors of P, I and N types, the first preparatory chamber and a buffer chamber II to be used for transfer, has two reaction chambers 101 and 103 and a buffer chamber 102, and isolated parts 44-47 are provided between each reaction chamber. Also, reactive gas feeding hoods 17 and 18 and exhaust hoods 17' and 18' are provided independently in such a manner that the reactive gas will be brought from the feeding system to the exhaust system in a laminar flow. The upper and the lower electrodes 51, 52, 61 and 62 are provided on the whole surface inside the hoods 17, 17' and 18, and a equifield is generated in the entire space in parallel with the substrate surface. Also, the reactive gas is laminar-flowed from the upper side hood to the lower side hood 17' through the confinement space of an external frame jig 38 so that the reactive gas will be brought in parallel with the surface of the substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plasma gas phase reaction method and an apparatus for producing the same.

An object of the present invention is to provide a space in a reaction vessel in which plasma is confined by an insulator, and to supply a pair of electric fields to the space using parallel electrodes, thereby producing a film having a uniform thickness.

For this purpose, the present invention generates an electric field, that is, lines of electric force, to be approximately parallel to the surface on which the substrate is formed, and an equipotential surface to be perpendicular to the formation surface of the substrate, thereby causing a plasma gas phase reaction. By surrounding the plasma with a surrounding insulator such as glass or alumina ceramic plate, it is electrically shielded from a metal reaction vessel such as stainless steel, and a parallel electric field similar to that at the center of the plasma is generated at the edge (periphery). The purpose of this is to form a film with a uniform thickness.

Conventionally, in the plasma vapor phase reaction (hereinafter referred to as PCVO) method, only a pair of electrodes are arranged in parallel to form two-row plate type electrodes, and a plasma discharge is generated between the electrodes by the glow discharge method. Formation of semiconductor coatings, etc. was performed. In such a PCVD method, since the positive column generated by plasma tends to spread throughout the entire space within the reaction vessel, the substrate is not disposed within the positive column, but is placed closely to one of the electrodes. (perpendicular to the electric field)
There is no other way to make the coating uniform within ±5% of variation other than by changing the structure.

However, in this method, the surface on which the electrode is formed cannot be made larger than the area of the electrode. Therefore, it has the disadvantage of being unsuitable for mass production.

On the other hand, a large number of substrates are placed at a certain distance (2 to 2) from each other so that the electric field between the parallel plate electrodes is approximately parallel to the surface to be formed.
A method of arranging them in a forest with a distance of 6 cm) is known.

An example of this is a patent application filed by an unexplored student (Plasma gas phase reactor, filed on September 20, 1980, patent application No. 1, 1982).
63728/163729/163730).

That is, in the so-called floating plasma vapor phase reaction method (hereinafter referred to as FPCVD method) in which the substrate is electrically isolated from any electrode (3) and a vapor phase reaction is carried out,
It has the advantage of being able to form coatings on a large number of substrates. Therefore, compared to the conventional method of disposing a substrate on one electrode of a parallel plate type electrode, productivity could be increased by 5 to 20 times. However, such FPCV
An example of the uniformity of film thickness obtained by method D is as shown in FIG.

In Figure 1 (A), the A-A', B-B', c
-c', D- The longitudinal cross-sectional view of the
>, shown in (E). Furthermore, the relative positional relationship between the substrate (1) and the electrodes (62) and (52) in FIG. 1(A) is shown.

The substrate (1) has a non-single crystal silicon semiconductor formed to a thickness of approximately 5000 nm, and a pair of electrodes (62), <52
), as shown in (C), the area near the electrode became thicker, and as shown in (B), <D>, and (E) (the central part of the electrode became thicker and the end part of the electrode became thinner). For this reason, the thickness of the film formed on the upper and lower side edges of the substrate (1) is 20 to 30% thinner than the thickness of the upper and lower edges of the central portion.

That is, compared to the conventionally known PCVD method, the high-frequency electric field used for the plasma reaction is supplied in a laminar flow along the surface to be formed, that is, the electric field is approximately parallel to the surface to be formed. Since it is arranged so that the formation surface is formed, spatter is reduced.

However, as a result of further examination of this dud's invention of the FPCVD method, we found that the insulating material (
1~ at the top and bottom of the upper space surrounded by quartz)
There is a gap (73), <73') with a width of 3 cm, and since a conductive stainless steel container is placed at ground level outside of the gap, plasma leaks to the outside from this gap. It was found that this leakage disturbed the electric field and lines of electric force in the reaction space, resulting in the formation of such a non-uniform coating. Furthermore, the flow of the reactive gas did not become a laminar flow due to the gap, and it was also found that the thickness of the coating on the surface to be formed near the gap became thinner.

Therefore, the present invention prevents such non-uniformity in film thickness (5), and ensures that all the peripheral and central parts of the rectangular formation surface have thickness variations within ±5% with respect to a predetermined thickness. To achieve this, the outside between the pair of electrodes and the periphery of the space where the substrate is placed are completely covered with insulators to prevent plasma from leaking outside of this cylindrical space (plasma confinement type). Invention by a dud student (patent application 1637-1987)
28 etc.) is further completed.

In this way, by confining the plasma and reactive gas and supplying the reactive gas as a laminar flow so as to lick the surface to be formed, mass production is possible and uniformity can be improved.
The feature is that it is kept within 5%.

Furthermore, the present invention forms a semiconductor layer as a double reaction vessel type in which the reaction vessel has a reaction space whose inner surface is made of an insulating material, and furthermore, a P-type semiconductor, an I-type semiconductor, and an N-type semiconductor are formed in the reaction vessel. When stacking and forming a bond on a substrate, a multi-chamber type PCVD method is proposed in which the respective reaction vessels are connected via a separation part, as shown in FIG. 2 ((6)).

In the present invention, by forming a non-single crystal semiconductor layer to which hydrogen or halogen elements are added, P and I
and N-type conductivity types, and forming a PIN junction at the lamination boundary thereof, and impurities from other adjacent semiconductor layers are mixed into each semiconductor layer, causing deterioration of the junction characteristics. Continuous production that avoids the formation of glabellar insulators due to oxidation of part of the semiconductor by exposing it to the atmosphere, especially oxygen, between the steps of forming each semiconductor layer. Concerning plasma gas phase reactions for conducting.

Furthermore, the present invention relates to a multi-chamber plasma reaction method in which a large number of such reaction vessels are connected independently for each reaction, and to a so-called mass production method in which a large number of substrates are simultaneously grown at a high film growth rate.

The present invention is capable of forming a film by bringing the back surfaces of the substrates into close contact with each other with a constant gap of 2 to 10 cm, and by separating the two substrate blocks from each other at a constant interval (for example, 6 cm < ±6 + nm) (7). It promotes uniformity of film thickness around the top, bottom, and center 1 of the substrate, which is arranged approximately parallel to the surface, and homogeneity of the ribs, and improves the yield of reactive gas. .

Furthermore, in the apparatus of the present invention, the heating of the substrate is reduced (both from above and below) by orienting bar-shaped infrared rays or halogen lamps bent at 90 degrees to each other to achieve uniform heating, i.e., 10 co+ ~50
cI11 e.g. 20cm and medium 15-12
0cII1 For example, a 60cm substrate (20em x 60
20 pieces per hatch (cm), and the temperature distribution was set to within ±3°C at a temperature setting of 100 to 650°C.

In FIGS. 2 and 3, a supply hood (39) includes means for introducing a reactive gas and means for exhausting a reactive gas.

The exhaust hood (39') is made of an insulating material, and the outside of the hood is wrapped with an insulating material. Furthermore, in order to confine the reaction space between the hoods, the outer periphery is covered with insulators (38).
, (38'). That is, by supplying active gas that causes a plasma reaction only to the space surrounded by the insulating chamber (8), that is, the cylindrical space (6), (8) of the confined reaction space, the chamber (reaction vessel>
<101>, <102>) This prevents the reaction products that have turned into plasma from diffusing and spreading throughout the entire space.

Furthermore, in order to make the electric lines of force from one electrode parallel to the other in this reaction space, electrodes are created on the entire paired surfaces of this cubic or rectangular parallelepiped space, and the electric force around the electrodes is This prevents the lines from becoming disordered. In addition, the reactive gas flows on one side (in this case, upward) so that it forms a laminar flow.
On the other side (in this case, downward), the flow was made to flow all over the periphery. Furthermore, mixing of impurities formed by such a gas phase reactor from each semiconductor layer to another semiconductor layer due to re-release of impurities deposited in the reaction vessel is eliminated. As a result, in the method and apparatus of the present invention, the number of flakes formed in each reaction vessel can be reduced for the first time, and the thickness of the mixture at the lamination interface of a plurality of semiconductor layers can be reduced by 200 mm.
~300 people and approximately 1/10 to 115 of the conventional value, and also reduced the variation in film thickness between substrates of the same batch by ±5%
(for example, assuming a thickness of 5,000 people, the variation is within ±250 people).

Embodiments of the present invention will be described below with reference to the drawings.

Example 1 An example of the plasma vapor phase reactor of the present invention will be described with reference to FIG.

This drawing shows semiconductors formed on semiconductors on a substrate such as PIN junction, PIF junction, NIN junction, PINPIN...PIN junction, etc., which have different conductivity types but different main components or stoichiometry The influence of the semiconductor layer formed in the previous process (
This is a device for automatically and continuously forming multiple layers to form layers without contamination (contamination).

In the drawing, a part of a plurality of reaction systems constituting a PIN junction is shown. In other words, it is a multi-chamber system that has two of the three reaction systems (■, ■) formed by laminating P, I, and N type semiconductor layers, a first preliminary chamber, and a buffer chamber (II) for relocation. (10) An example of a plasma gas phase reactor is shown.

Systems ■, ■, and ■ in the drawings represent two reaction vessels (10
1), (103) and a buffer room (102),
Between each reaction vessel, 11 parts (44), (4
5), <46).

(47). Also independently, reactive gas supply hoods <17), (18) and exhaust hoods (
17'>(1B'), and the reactive gas is provided to flow laminarly from the supply system to the exhaust system.

This device is provided with a first preliminary chamber (100) on the entrance side, and first, two substrates (1) having two formation surfaces on two surfaces of a substrate holder (2) are inserted through a door (42). I inserted it. Furthermore, this holder (3) is attached to an outer frame jig (9 on the outer periphery).
38) and <38'>) are arranged at a predetermined equal distance from each other. That is, the back side of the substrate having this surface on which the film is not formed is in contact with the substrate holder (2), and the two substrates and the substrate holder are combined into one holder (3).
They were placed in a forest in an insulating outer frame jig with a gap of GclIl±0.5 cm. As a result, 20cm x 6
It was possible to form coatings on 20 substrates of 0 cm at the same time. Thus, the height (11) is 35 cm, depth 80 cm, and reaction space (6
), < 8) are above and below are insulators (39), (39
The side periphery is surrounded by an insulating outer frame jig (38), <3
8'), and the gap (73) was 5I or less. Thus, the inner surface (74) of this outer stainless steel container gate was made of an insulator, and quartz, alumina, etc. were pasted thereon to prevent the plasma from escaping. That is, the plasma was electrically completely surrounded by an insulator. Furthermore, this first preparatory chamber (100) was evacuated by opening a valve using a vacuum pump (35). After that, the gate valve (44) for separation from the reaction vessel (101'') which had been evacuated in advance was opened and the substrate held in the outer frame jig (38) was transferred.For example, the substrate held in the outer frame jig (38) was transferred. ), the substrate was transferred to the first reaction vessel (101), and the gate valve (44) was further closed to move the substrate to the first reaction vessel (101).

At this time, the substrate (1) etc. held in the first reaction container (101) are transferred to the buffer chamber (102) in advance or at the same time.
In addition, the jig and substrate (2) held in the sofa room (102) are transferred to the second reaction container (103), and the substrate held in the second (12) reaction container (103) is transferred to the second reaction container (103). Although not shown, the substrate and jig of the third reaction chamber are placed in the second buffer chamber (104), and gate valves (45>, <46>, (47)) are placed in the second preliminary chamber on the exit side. It is possible to open and move the gate valve. After this, the gate valve < 44
>, <45), <46>, <47> were closed.

In other words, the movements of the gate valves are as follows: when the door (42) is opened at atmospheric pressure, the gate valves (44), <45>, (4
6) and <47) are closed, and a plasma gas phase reaction is performed in each chamber. Conversely, the door (42
) is closed and the preliminary chamber (100) is sufficiently evacuated, the gate valves <44), <4s>, <
4 e > and < 47 > are opened, and the substrate and jig in each chamber have a mechanism to move to the adjacent chamber to prevent outside air from entering the reaction chambers ( 101 ) and < 102 ).

The case where a P-type semiconductor layer is formed by the PCVD method in the first reaction vessel (101) in system (2) will be described below.

Reaction system ■ (including reaction vessel (101)) is 10-3~
10 torr, preferably 0.01 to Itorr, e.g. 0
．． It was set to 08 torr.

(13) The reactive gas is silane (S) for silicide gas (24).
inHun! i n≧1, especially SiH+ or St, H,
), silicon fluoride (S+% or 5iFz), etc.
Silane was used because it is easy to handle.

In order to form 5ixC1-x (0<x<1) of this example, DMS (dimethylsilane (Sin, (CIll)2) was used as the carbide gas (25).

For silicon carbide (SixC+-x O<x<1),
As a P-type impurity, boron was simultaneously mixed into the monosilane described above at a concentration of 0.5% and supplied together with the silane from (24).

If necessary, hydrogen (H) or nitrogen (N2) was vaporized from liquid nitrogen and supplied from (23) when the reaction chamber was brought to atmospheric pressure. These reactive gases are separated by their respective flow meters (
33) and the valve (32), the negative electrode (61) of the high frequency power source (14) is supplied from the reactive gas supply hood (17)
) was supplied to the reaction space (6). The reactive gas is supplied into a cylindrical space (6) surrounded by a holder (38),
A film was formed on the substrate (1) constituting this space. Furthermore, an electric energy of, for example, 1
High frequency energy (14) of 3.56 MHz was applied to cause a plasma reaction, and a reaction product formed a film on the substrate.

The substrate was heated to 100-400°C, for example 200°C, by an infrared heater (11), <11').

This infrared heater is a near-infrared halogen lamp (emission wavelength 1 to 3μ) heater or a far-infrared ceramic heater (
Since it has a rod shape, the upper heater and the lower heater are arranged in directions orthogonal to each other, and the cylindrical space surrounded by the holder in this reaction vessel is preferably heated at 200 ± 10 °C. was installed within ±5°C.

Thereafter, as described above, the above-mentioned reactive gas was introduced into the container, and high frequency energy (14) of 10 to 500 W, for example 10-, was supplied to cause a plasma reaction.

Upper and lower electrodes (61), <51X reticulated stainless steel electrodes 80cmX80cmX61),
) and (17') so that an equal electric field is parallel to the substrate surface (15) and occurs throughout the reaction space. In addition, the reactive gas was also caused to flow in a laminar manner from the upper hood to the lower hood (17') through the confined space of the outer frame jig (38) so as to be parallel to the surface of the substrate (1).

Thus, the P-type semiconductor layer is BeH, /5iH4=0.5%
.

A thin film having a thickness of approximately 100 mm (film thickness variation: 95 to 103 mm) was formed using this reaction yarn (1) under the conditions of DMS/C3xH+40MS-) = 10%. Eg=2.05eνg=1 x 10-G~3
x 10-5 (ocm)-'.

The substrate is a conductive substrate (stainless steel, titanium, aluminum, or other metal), 2 semiconductors (silicon, germanium-containing insulator, glass, organic thin film), or a composite substrate (a transparent conductive film on glass or a transparent organic resin). A single layer of a conductive film such as tin oxide or ITO to which certain fluorine was added or a two-layer film of SnO+ formed on ITO was used. These are collectively referred to as a substrate not only in this embodiment but also in all of the present invention. Of course, this substrate may be flexible or a rigid plate.

(16) In this manner, a plasma vapor phase reaction was performed for 1 to 5 minutes to produce a silicon carbide film doped with boron as a P-type impurity to a thickness of about 100 mm. Further, the substrate on which the first semiconductor layer is formed is moved to the buffer chamber (102) according to the above-described operation order, and the gate (45) is opened.
closed. Furthermore, after evacuating to below 10 torr using the Talaiobon pump (34), the gate (4
6) was opened and an intrinsic semiconductor layer was formed to a thickness of approximately 5000 nm.

That is, in the reaction system (2) in FIG. 1, monosilane or disilane is used as the reactive gas of the semiconductor from (28),
In addition, in order to add boron of 101'1c111-" or less, B and H3 diluted to 0.5 to 30 PPM with hydrogen, silane, etc. are added from (27), and a carrier gas is added from (26) as necessary. supplied.

The reactive gas flows from the top to the bottom along the surface of the substrate (1) to be formed, and reaches the vacuum pump (88). Figure 3 shows a longitudinal cross-sectional view of system (1) viewed from the outlet side.

Figure 3 is outlined.

(17) FIG. 3 shows a longitudinal cross-sectional view of the reaction system (1) in FIG. 2.

In the drawings, halogen lamps are used for the heaters (13) and (13'). The reaction space is heated to 100~4
00°C, for example, 250°C. The reactive gas decomposed, for example, monosilane or disilane.

The board (1) is held in the board holder (2), and the outer frame jig (
38) and <38') constitute a confined space (8). An electric field (90) was applied approximately parallel to the formation surface of this substrate by a pair of main electrodes (62) (<52) to perform a plasma vapor phase reaction.

Furthermore, the reactive gas (91) was also made parallel to the surface to be formed. The reactive gas was exhausted from (26), <27>, and (2B) to the vacuum pump (37) via the supply hood (18), the outer frame jig (38), <38'), and the exhaust hood (18). . When amorphous silicon is made with silane as a coating, SiH, 60 cc/min, to a thickness of 5000,
Film formation speed: 2.5 persons/sec, substrate (20 cm x 60
20 cm, total area 24000 cd), pressure Q,
It was set to l torr. When 5I211° was used, the film formation rate was 28 people/sec, and the other (18) were the same. Then, the number of people in the central area varied to 5,000.
In the case of the conventional method, the vertical peripheral area was f 3000 people (variation ±20%), but with the method of the present invention, it was ±25
We were able to significantly improve the uniformity with 0 people (±5%).

Thus, in the first reaction chamber, a P-type semiconductor layer was formed by the plasma vapor phase method, and then an I-type semiconductor layer was formed by the PCVD method to form a PI junction.

After forming the substrate to a thickness of about 5,000 in system ①, the substrate is placed in the adjacent buffer chamber (10
2'), and was further moved to an adjacent reaction chamber, where an N-type semiconductor layer was formed by the same PCVD process. This N-type semiconductor layer is made by converting phosphin to PH3 using the PCVD method.
/5iH4 = 1.0% silane and carrier gas hydrogen were supplied as SiH◆/Hz = 20% to form an N-type microcrystalline or fibrous structure to a thickness of approximately 200 mm in the same manner as system ◆. A polycrystalline semiconductor layer is formed, and silicon carbide is further deposited on the upper surface of the polycrystalline semiconductor layer with DMS/(SiH+DMS)=o
, t is 5ixC1,x (0<x<1), and is formed by stacking N-type semiconductor layers to a thickness of 10 to 200 layers, for example (19), 50 layers.

Other reactor equipment is the same as for system ①.

After this process, a 100 to 1500 thick I layer is placed on the substrate that is taken out from the second preliminary chamber to form a PIN junction.
Further, a reflective or sublimable metal electrode such as an aluminum electrode is formed on top of the TO to a thickness of about 1 μm by vacuum evaporation, and the (ITO + SnO+) surface electrode - (PIN semiconductor) - (back surface electrode) is formed on the glass substrate. ) was configured.

Its characteristics as a photoelectric conversion device are 7 to 9%, average 8% to 1
．． AMI (100mW) with a board of Ocm x 10cm
/ctA) as an intrinsic efficiency characteristic under the conditions of 20 cm x 60
An effective efficiency of 4.5% could be obtained even with a glass substrate of cm.

This improvement in efficiency is due to the fact that the film thickness at the periphery of a large area substrate can be reduced from the conventional 5000±3000 to 5000±250, which is the optimal film thickness for IN. Compared to the P- or N-type semiconductor layer, the film thickness varied too much and sufficient open circuit voltage could not be produced.
The method of the present invention can produce an extremely uniform (20) film thickness, resulting in a
The open circuit voltage for one element is 0.85 to 0.9V (0,87
±0.02V), but the short circuit current was 18±2mA.
/c11, and the FF was large, ranging from 0.60 to 0.70, and the variation thereof was small within panels and batches, proving that the method of the present invention is industrially very effective.

FIG. 4 shows the distribution when non-single crystal silicon is formed to a thickness of 0.5 μm using the second reaction system (1) in FIG.

As is clear from Fig. 4, the substrate (1), the electrode (62)
, <52>, is confined by an insulator (39).

(39'>(3B>,(3B'), Fig. 4 (A
) of A-A', B-B', c-c', D-D'
The thickness distribution in each cross section of (B) and (C) #
Shown in (D) and (E). All of these cross-sectional views have extremely uniformity compared to Figure 1, and have sufficient ± for practical purposes.
It was found that the variation was within 5%.

Further, in FIG. 4(A), electric lines of force (72) and equipotential surfaces (87) are shown corresponding to the electric field (90).

(21) And this electric field (90) and the flow of reactive gas (91
) is shown to be formed parallel to the surface to be formed, corresponding to FIGS. 2 and 3.

Regarding the types of semiconductors to be formed, not only Si but also Ge of group II, 5ixCl-X (0< x < 1
>, 5ixGe 1-X (0<x<1>, 5ixSn
I-X (0<x<1) Even if it is a single layer or a multilayer, in addition to these, GaAs, GaA IAs +
It goes without saying that a compound semiconductor such as BP or CdS may also be used.

The present invention demonstrated a multi-chamber PCVD method using three reaction vessels. However, this was used as a single reaction vessel, and silicon nitride was converted into silane (SiH) using the PCVD method.
pc of 4 or 5i2H () and ammonia (NH,)
Formation by vn reaction is effective.

It is also effective to form silicon oxide by a PCVD reaction of silane with N,0.

The non-single crystal semiconductor film formed according to the present invention is an insulating (22) N (source) I in an edge-gay L-type field effect semiconductor device.
(Channel formation region) N (drain) junction or PIF
It is also effective for joining. Furthermore, the energy hand 11 is a PIN diode and the energy hand 11 is W-N-W (WIDE
-NALL (V-WIDE) or 5ixC1-x-5
i −5ixC+−x (0<x< 1) structure PI
An N-junction visible light laser, light-emitting element, or photoelectric conversion device may be made. In particular, the energy band on the previously incident light side is widened (so-called W (P or N type)-N (L type) with a thick heterojunction structure).
We believe that this technology is extremely important industrially, as it makes it possible to create and stack products independently in each reaction chamber, with different conductivity types as well as different products.

In the present invention, the separation part is not just a gate valve;
It was effective to provide two gate valves and one buffer chamber as system 2 to further prevent impurities of the P-type semiconductor from entering the I-type semiconductor layer and to improve the characteristics.

This plasma CVD apparatus of the present invention can be used with other structures (23
) Needless to say, it can be applied to the multi-chamber method.

The electric fields are shown as a pair in the vertical direction. However, a pair of electric fields may be provided perpendicularly to the upper and lower electric fields.

Further, the embodiment of the present invention was of a multi-chamber type as shown in FIG. 2, and the PCVD method was supplied to all the reaction vessels. However, if necessary, a composite film may be formed by employing a photo-CVD method or LT CVD method (also referred to as HOMOCVD method) that does not use plasma.

[Brief explanation of the drawing]

FIG. 1 shows the non-uniformity of film thickness on a substrate obtained by a conventional method. FIGS. 2 and 3 schematically show a plasma gas phase coating manufacturing apparatus for carrying out the present invention. FIG. 4 shows the uniformity of the film thickness of the substrate obtained by the method of the present invention. Patent Applicant Semiconductor Energy Laboratory Co., Ltd. Representative Shunpei Yamazaki (24) ) ~ Do-X m-1 (E) Pol■ -50 ΦNo/ ~1 (F-) East4■

Claims (1)

[Claims] 1. In a plasma gas phase reaction formed by arranging a plurality of substrates approximately parallel to an electric field generated by a pair of parallel plate electrodes, the outside of the electrodes and the outer periphery between the pair of electrodes are While shielding with an insulator, a reactive gas is supplied along the surface of the substrate to form a conductor,
A plasma vapor phase reaction method characterized by forming a single film of a semiconductor or an insulator. 2. By arranging a plurality of substrates approximately parallel to the electric field generated by a pair of parallel plate electrodes, and wrapping the outside of the pair of electrodes and the outer periphery between the pair of electrodes with an insulating material, substantially no insulating material can be formed. A closed space is provided, and reactive gas supply means and exhaust means are provided from one side of the space to the other side to supply the reactive gas along the surfaces of the plurality of substrates. Plasma gas (1) Phase reaction production equipment.