JPS60111415A - Plasmic vapor-phase reaction equipment - Google Patents

Abstract

PURPOSE:To form a film of uniform thickness by a method wherein a plasma confinement space is provided in a reactive chamber using an insulator, and a pair of electric fields are supplied into the plasma confirnement space using a paralleled flat-plate electrode. CONSTITUTION:A substrate 1 is supported by a substrate holder 2 in the reaction chamber 102 of a meltichamber system plasmic vapor-phase reaction equipment, and a confinement chamber 8 is constituted by external frme jigs 38 and 38'. On the surface where said substrate will be formed, an electric field is supplied by a pair of main electrodes 52 and 62 in parallel ith the substrate surface, and a plasmic vapor-phase reaction is performed. Besides, reactive gas 91 is also brought in the state which in parallel with the surface where the substrate will be formed, and the reactive gas is supplied from 26-28, passes through a supply nozzle 18, a reaction space 8 and an exhaust nozzle 18, and exhausted to a vacuum pump 37. When amorphous silicon is formed into a film using silane, the irregularity in film thickness of the substrate is very small, and the uniformity of film thickness can be improved.

Description

[Detailed description of the invention] The present invention relates to a plasma gas phase reaction manufacturing apparatus.

The present invention relates to a plasma vapor phase reaction apparatus in which a reaction space is provided in a reaction vessel, and opening/closing means, such as doors, are provided on the front and rear sides of the reaction vessel, and heating means is provided on the door.

An object of the present invention is to provide lamp heaters as heating means that supply radiant heat parallel to the surfaces of substrates spaced apart from each other at regular intervals, thereby facilitating maintenance of the lamp.

An object of the present invention is to provide a space in a reaction vessel in which plasma is confined by an insulator, and to supply a pair of electric fields to the space using parallel plate electrodes, thereby producing a film having a uniform thickness.

In order to uniformly form a film on the surface to be formed, the present invention generates an electric field, that is, lines of electric force, approximately parallel to the surface of the substrate to be formed, and an equipotential surface perpendicular to the surface, thereby causing a plasma gas phase reaction. This plasma, especially the positive column, is surrounded by a surrounding insulator such as a glass or alumina ceramic plate to electrically shield it from a metal reaction vessel such as stainless steel.
The purpose is to form a film with a uniform thickness by generating a parallel electric field similar to that at the center of the plasma at the edges (periphery).

Conventionally, in the plasma vapor phase reaction (hereinafter referred to as PCVD) method, a pair of electrodes are arranged in parallel to form a parallel plate type electrode, and a plasma discharge is generated between the electrodes using a glow discharge method to form a semiconductor film, etc. was going on. Further, heating of this substrate was provided so that radiant heat was applied to the back surface of the substrate perpendicularly to the substrate. For this reason, only one substrate having the same area as the substrate could be heated with one heater. In addition, in this PCVD method, since the positive column generated by plasma tends to spread throughout the entire space inside the reaction vessel, the substrate is not disposed within the positive column but is placed closely on one of the electrodes. (perpendicular to the electric field)
There is no other way to make the coating uniform within ±5% of variation other than by changing the structure.

However, in this method, the surface on which the electrode is formed cannot be made larger than the electrode area (3). Therefore, it has the disadvantage of being unsuitable for mass production.

On the other hand, a large number of substrates are placed at a certain distance (2 to 2) from each other so that the electric field between the parallel plate electrodes is approximately parallel to the surface to be formed.
A method of arranging them in a forest with a distance of 6 cm is known.

An example of this is the patent layer filed by an undiscovered student (Plasma gas phase reactor, filed on September 20, 1980, patent application No. 1983)
63728/163729/163730).

That is, in the so-called floating plasma vapor phase reaction method (hereinafter referred to as PPCVD method) in which a vapor phase reaction is performed by separating the substrate electrically from any electrode, it has the advantage that a film can be formed on a large number of substrates. .

Therefore, compared to the conventional method of disposing a substrate on one electrode of a parallel plate type electrode, productivity could be increased by 5 to 20 times. However, the uniformity of the film thickness obtained by such PPCVD method was as shown in FIG. 1 as an example.

11thffl (A) Ni#ia, Sono-1, B-
B', (4) c-c', D-I)'
), <D), and (E). Furthermore, Figure 1 (A)
The relative positional relationship between the substrate (1), the electrode (82), <52), and the heaters (13), (13') in FIG. The substrate (1) is made of a non-single crystal silicon semiconductor with a thickness of approximately 5,000 mm, and a pair of electrodes (62), <
52) As shown in (C), the area near the electrode becomes thicker,
Furthermore, as shown in (B), (D>, and (E)), the central part of the electrode was thick, and the electrode end part was thin.

For this reason, the thickness of the film formed on the upper and lower side edges of the substrate (1) is 20 to 30% thinner than the thickness of the upper and lower edges of the central portion.

As a result of further investigation of the invention of the PPCVD method by a dud student, we found that a 1-3 cm wide area was formed at the top and bottom of the space above the part surrounded by the insulating material (quartz) in the peripheral part (38), <38'). Because there are gaps (73) and (73'>, and a conductive stainless steel container is placed at ground level outside of these gaps, plasma leaks to the outside from here. This leakage causes the electric field in the reaction space to It was found that this was due to the formation of such a non-uniform film (5) due to the disturbance of the electric lines of force.

In addition, maintenance of the heater (13), <13') is inconvenient, and in particular, when replacing the upper lamp heater (13), the operator must lie on his or her back.

For this reason, the PPCVD method, which uniformly heats the reaction space and allows easy maintenance of the lamp, has been sought. The present invention satisfies these objects and at the same time has a structure in which the gap (73) in the reaction space is substantially eliminated by the insulating cover of the heater.

In this way, by confining the plasma and reactive gas and supplying the reactive gas as a laminar flow so as to lick the surface to be formed, mass production is possible and uniformity can be improved.
The feature is that it is kept within 5%.

Furthermore, the present invention forms a semiconductor layer as a double reaction vessel type in which the reaction vessel has a reaction space whose inner surface is made of an insulating material, and furthermore, a P-type semiconductor, a summer-type semiconductor, and an N-type semiconductor are formed in the reaction vessel. We propose a multi-chamber type PCVD method in which reaction vessels are connected via separation parts when laminating and forming a bond on a substrate, as shown in FIG. 2.

In the present invention, by forming a non-single-crystal semiconductor layer to which hydrogen or halogen elements are added, P and l
and N-type conductivity types, and forming a PIN junction at the lamination boundary thereof, and impurities from other adjacent semiconductor layers are mixed into each semiconductor layer, causing deterioration of the junction characteristics. Continuous production is performed to prevent the formation of glabellar insulators due to oxidation of part of the semiconductor by exposing it to the atmosphere, especially oxygen, between the steps of forming each semiconductor layer. Concerning plasma gas phase reactions.

Furthermore, the present invention relates to a multi-chamber plasma reaction method in which a large number of such reaction vessels are connected independently for each reaction, and to a so-called mass production method in which a large number of substrates are simultaneously grown at a high film growth rate.

In the present invention, the back surfaces of the substrates are brought into VB contact with each other through a constant gap of 2 to 10 cm, and the two substrates are placed at a constant distance (for example, 60IIl<±6++++a).
By separating each other from each other, the film thickness is uniform at the top, bottom, and around the center 1 of the substrate, which is arranged approximately parallel to the film formation surface, and the film quality is homogeneous. It is meant to improve.

i.e. 10cm x 10cm or lθ~5 in the electrode direction
0C11 For example, it has 20 can and middle 15~
120 cta e.g. 60cIIl substrate (20cm
20 x 60cm sheets per batch), the yield was improved to 20-25% from 3-5% in the conventional method.

In FIGS. 2 and 3, a reactive gas introducing means and an exhaust means are provided, and a supply nozzle and an exhaust nozzle are provided for these, and a pair of electrodes (
61), <51> or (62), <521>, and reactive gas supply nozzles (17>, (18) and exhaust nozzles (17') (1B') were provided. That is,
The structure is such that the outside of the electrode is wrapped in an insulating hood. Furthermore, in order to confine the reaction space between the hoods, the outer periphery is h'? Surrounded by 3 edges (3B>, <38'). In other words, the space surrounded by the insulator holder, that is, the confined space (8
) By supplying the active gas that causes a plasma reaction only to the cylindrical space (6), <8) of the reaction space, the reaction that has turned into plasma is generated in the entire space inside the chamber (reaction vessel><101>, (102)). This prevents the product from diffusing and spreading.Also, Figure 3 shows a cross-sectional view of Figure 2, showing the front (left side of the drawing) and rear (right side of the drawing) of the reaction vessel.
An opening/closing door was provided, and heating means (13), <13') using a halogen lamp or the like was provided on the inner surface of this door. This way, even if the lamp breaks down, it will be easy to replace and it will be safe! During this process, contamination of the inner surface of the reaction vessel (103) could be prevented.

Embodiments of the present invention will be described below with reference to the drawings.

Example 1 An example of the plasma vapor phase reactor of the present invention will be described with reference to FIGS. 2 and 3.

This drawing shows semiconductors formed on semiconductors on a substrate such as a PIN junction, PIP junction, NIN junction, or PINPIN... This is an apparatus for automatically and continuously forming multiple layers in order to laminate each semiconductor layer without being influenced (contaminated) by the (9) semiconductor layer formed in the previous process.

In the drawing, a part of a plurality of reaction systems constituting a PIN junction is shown. In other words, it is a multi-chamber system having two of the three reaction systems (■, ■) formed by stacking P, I, and N type semiconductor layers, a first preliminary chamber, and a buffer chamber (n) for relocation. An example of a plasma gas phase reactor is shown below.

Systems ■ and L■ in the drawing represent two reaction vessels (101
), <103 ) and one pants compartment (102),
Separation parts (44), (45), (
46) and (47). In addition, each of the reactive gas supply nozzles (17), (1B) and exhaust nozzles (17') (18) are provided, each of which is provided so that the reactive gas flows laminarly from the supply system to the exhaust system.

This device is provided with a first preliminary chamber (100) on the entrance side, and first, two substrates (1) having two formation surfaces on two surfaces of a substrate holder (2) are inserted through a door (42). I inserted it. Furthermore, this holder (3) is shown as the outside (10) frame jig (only the outside periphery (38), <38')
They were arranged at a predetermined equal distance from each other. That is, the back side of the substrate having this surface on which the film is not formed is in contact with the substrate holder (2), and the two substrates and the substrate holder are treated as one holder (3) with a gap of 6 cm ± 0.5 cm. They were placed in a forest inside an insulating outer frame jig. As a result, 2
It was possible to form coatings on 20 substrates measuring 0 cm x 60 cm at the same time. Thus height 35C1l1% depth 8
The reaction spaces (6), (, 8) of 0 cm and 80 cm inside are surrounded by insulators (39), (39') on the upper and lower sides, and an insulating outer frame jig (38), (<38') around the sides. The gap (73) was 10 mm or less.

Also, the far outside of this gap (Fig. 3) is the insulation hood (39) of the outside lamp heater (13), (13').
39') and the protective quartz cover (10) <10'), we were able to create a structure in which no plasma leaked out. That is, the plasma was electrically completely surrounded by an insulator. Also a quartz cover for the lamp (10).

The yield of the gap between (10') and the hood (39), <39') is 2 to 5 a + m, the depth is more than 10 times, and (11) the mean free running diameter of the reactive gas (5 to 10111111), it was possible to insulate it with equal constraints.

First preliminary chamber (100) *The valve was opened using the vacuum pump (35) to create a vacuum. After this, a gate valve (
44) was opened and the substrate held in the outer frame jig (38) was transferred. For example, the first reaction vessel (
101), and then the gate valve (44) was closed to move the substrate to the first reaction vessel (101). At this time, the substrate (1) etc. held in the first reaction vessel (101) are placed in the buffer chamber (102) in advance or at the same time, and the jig and substrate (2) held in the buffer chamber (102) are Second reaction vessel (103)
In addition, the substrate held in the second reaction vessel (103) is transferred to the second buffer chamber (104'), and although not shown, the substrate and jig in the third reaction chamber are transferred to the outlet side. Gate valve (45), <46>, <
47') can be opened and moved. After this, gate valve (44>, (45>, <46>, <
47) was closed.

(12) That is, the movement of the gate valves is as follows: when the door (42) is opened at atmospheric pressure, the gate valves (44>, <45>, (4) of the separation section
6) and (47) are closed, and a plasma gas phase reaction is performed in each chamber. Conversely, when the door (42) is closed and the preliminary chamber (100) is sufficiently evacuated, the gate valves (44>, (45), (46), (47)
) is opened, the substrate and jig in each chamber have a mechanism to move to the adjacent chamber, and outside air is brought into the reaction chamber (101), <1
02) to avoid contamination.

The case where a P-type semiconductor layer is formed by the PCVO method in the first reaction vessel (101') in system (2) will be described below.

Reaction system 1 (including reaction vessel (101)) is 10-3~
10 torr, preferably 0.01 to 1 torr, e.g. Q
, Q8torr.

The reactive gas is silane (S) for silicide gas (24).
inHz*+t n≧1 especially sin+ or St, %)
, silicon fluoride (S i % or SiF), etc., but silane, which is easy to handle, was used.

In order to form 5ixC+me (Q<x<1) in this example, DNS (dimethyl silica) was used as carbide gas (25).
13) SiHL(CH,) was used.

For silicon carbide (SixC+-x O<x<1),
As a P-type impurity, poron was mixed into the monosilane described above at a concentration of 0.5% and supplied together with the silane from Simultaneous Co., Ltd. (24).

If necessary, hydrogen (HL) or nitrogen (N2) was vaporized from liquid nitrogen and supplied from (23) when the reaction chamber was brought to atmospheric pressure. These reactive gases are separated by their respective flow meters (
33) and the valve (32), the negative electrode (61) of the high frequency power source (14) is supplied from the reactive gas supply nozzle (17).
) was supplied to the reaction space (6). The reactive gas is supplied into a cylindrical space (6) surrounded by a holder (3 days),
A film was formed on the substrate (1) constituting this space. Further, electric energy, such as high frequency energy (14) of 13.56 MHz, was applied between the negative electrode (61) and the positive electrode (51) to cause a plasma reaction, and a reaction product was formed on the substrate.

The substrate is heated to 100 to 400°C, for example, 200°C, in red (14) disposed before and after the reaction vessel (103) shown in FIG.
) Heated by the same means as the external wire heater.

This infrared heater is a near-infrared halogen lamp (emission wavelength 1 to 3μ) heater or a far-infrared ceramic heater (
The cylindrical space surrounded by the holder in this reaction vessel is preferably heated to 200±10°C by using a light emitting wavelength of 8 to 25μ), and because it has a rod shape, the front heater and rear heater are arranged in directions orthogonal to each other. was installed within ±5°C.

Thereafter, as described above, the above-mentioned reactive gas was introduced into this container, and high frequency energy (14) was further supplied to 10-50011, for example 100-, to cause a plasma reaction.

The upper and lower electrodes (61), < 51) < reticulated stainless steel electrodes 80 cm x 80 cm) are connected to the hood (39), <
39') so that an equal electric field was generated in the entire reaction space parallel to the substrate surface. In addition, the reactive gas was also caused to flow in a laminar manner from the upper hood to the lower hood (39') through the confined space of the outer frame jig (38) so as to be parallel to the surface of the substrate (1).

Thus, the P-type semiconductor layer is BLH, /SiH, ~0.5%
.

(15) Under the condition of DMS/(S+H,,+DMS)=10%, this reaction system I was clustered as a thin film having a thickness of about 100 (film thickness variation: 95 to 103).

f! g=2.05eVa=IX10-' ~3
X10''+ (ocm)-'.

Substrates include conductor substrates (stainless steel, titanium, aluminum, and other metals), semiconductors (silicon, germanium),
An insulator (glass, organic thin film) or a composite substrate (a single layer of a conductive film such as tin oxide, ITO, etc. with fluorine added as a transparent conductive film on glass or a transparent organic resin)
A two-layer film on which SnO* was formed was used. These are collectively referred to as a substrate not only in this embodiment but also in all of the present invention. Of course, this substrate may be flexible or a rigid plate.

In this way, a plasma vapor phase reaction was carried out for 1 to 5 minutes, and a silicon carbide film doped with boron as a P-type impurity was produced to a thickness of about 100 mm. Further, the substrate on which the first semiconductor layer was formed was moved to the buffer chamber (102) according to the above-described operation sequence after opening the gate (45), and closing the gate (45). Further, after evacuating to below (16) 10-' torr using a Talio pump (34), the gate (46) was opened and an intrinsic semiconductor layer was formed to a thickness of about 5000 nm.

That is, in the reaction system (2) in FIG. 1, monosilane or disilane is used as the reactive gas of the semiconductor from (28),
In addition, in order to add less than 10 yen cm-El of boron,
B diluted to 0.5-30 PPM with hydrogen, silane, etc.
, H, were supplied from (27), and a carrier gas was supplied from (26) as required.

The reactive gas flows from the top to the bottom along the surface of the substrate (1) to be formed, and reaches the vacuum pump (88). Figure 3 shows a longitudinal cross-sectional view of system (1) viewed from the outlet side.

Figure 3 is outlined.

FIG. 3 shows a longitudinal sectional view of the reaction system (1) in FIG. 2.

In the drawings, a rod-shaped halogen lamp was used as the lamp heater (13), <13'. The temperature of the reaction space was set at 100 to 400° C., for example, 250° C., using a heater.

This space is a quartz or ceramic hood (39).

(17) The outside is insulated by (39'> and quartz outer frame jigs (3B>, (3B'). Furthermore, the gap (73), <
73') also has a quartz cover (1) of its outer heater (13').
0'>, the plasma is completely isolated from the reaction space (8
) so that it can be trapped inside. Also heater (13)
, <13') are inserted into the inner surface of the openable/closable door (12>, <12'), making it possible to perform maintenance simply by opening the door. In order to promote uniformity of temperature in the space, a small amount of a radiant halogen heater (11) was added to the lower side, and the reaction space was kept at a predetermined temperature of ±5°C.

The board (1) is held in the board holder (2), and the outer frame jig (
3B>, <38') constitute a confined space (8). An electric field (90) was applied approximately parallel to the formation surface of this substrate by a pair of main electrodes (62), (52) to perform a plasma vapor phase reaction.

Furthermore, the reactive gas (91) was also made parallel to the surface to be formed. Reactive gas is supplied from (26), <27), <28) through the supply nozzle (1B), the reaction space (8), the exhaust nozzle (18)
) and was evacuated to a vacuum pump (37). When amorphous silicon is made with silane as a coating, (18
) 5,000 thicknesses 60cc/min, film formation rate 2.5mm/sec, substrate (20cllx 60c+n
20 sheets, total area 24000-), pressure Q, l to
It was set as rr. When using 5iLHt, the film formation rate was 28 persons/second, and other conditions were the same.

Then, the center part varies by 5,000 people, and the vertical peripheral part by the conventional method has a variation of ±3,000 people (variation ±20%).
However, the device of the present invention was able to significantly improve the uniformity to ±250 people (±5%).

Thus, in the first reaction chamber, a P-type semiconductor layer was formed by the plasma vapor phase method, and then an I-type semiconductor layer was formed by the PCVD method to form a PI junction.

After forming the substrate to a thickness of about 5,000 in system ①, the substrate is placed in the adjacent buffer chamber (10
2), and was further moved to an adjacent reaction chamber, where an N-type semiconductor layer was formed by the same PCVO process. This N
The type semiconductor layer is made by converting phosphin into P HJ by PCVD method.
The N-type microcrystalline or Polycrystalline semiconductor layer with fiber structure (19
) is formed, and silicon carbide is further deposited on the top surface by DMS/(S
r H/l+ DMS) -0,1 as SixC
1-x (0<x<1)
The layers are laminated to a thickness of 0 to 200 people, for example, 50 people.

Other reactor equipment is the same as System 1.

After this process, a 100 to 1500 thick I layer is placed on the substrate that is taken out from the second preliminary chamber to form a PIN junction.
Further, a reflective or sublimable metal electrode such as an aluminum electrode is formed on top of the TO to a thickness of about 1 μm by vacuum evaporation, and a (ITO+SnO++) surface electrode - (PIN semiconductor) - (back surface electrode) is formed on the glass substrate. I configured it.

Its characteristics as a photoelectric conversion device are 7 to 9%, average 8% to 1
AMI (100a+W) with a board of 0cm x 10cm
/cj) as an intrinsic efficiency characteristic, and even in a 20 cm x 60 cm glass substrate integrated into a hybrid type, an effective efficiency of 4.5% could be obtained.

This improvement in efficiency is due to the fact that the film thickness at the periphery of a large-area substrate can be reduced from the conventional 5000±3000 to 5000±250, which is the optimal film thickness for one layer (20
), and similarly, compared to conventional P- or N-type semiconductor layers where the film thickness varied too much and sufficient open-circuit voltage could not be produced, the method of the present invention was able to make the film thickness extremely uniform. As a result, the open voltage for one element was 0.85 to 0.9V (0.87±0.02V), but the short circuit current was as large as 18±2mA/ctA.
In addition, the PF was as large as 0.60 to 0.70, and its variation was small within panels and batches, proving that the method of the present invention is industrially very effective.

FIG. 4 shows the distribution when non-single crystal silicon is formed to a thickness of 0.5 μm using the second reaction system (III) in FIG.

As is clear from Fig. 4, the substrate (1), the electrode (62)
t(52), is an insulator (39>, <39') (38)
, <38'), and the fourth
The thickness distribution at each cross section of A-A'', B-B'5C-C'', and D-D' in Figure (A) is (B >, < c)
Shown in #(D)e(E). It has been found that all of these cross-sectional views have extremely uniformity compared to FIG. 1, with variation (21) within ±5%, which is sufficient for practical use.

Also, in Figure 4 (A), electric lines of force (72 equipotential surfaces (
87) is shown corresponding to the electric field (90).

This electric field (90) and the reactive gas flow (91)
) is shown to be formed parallel to the surface to be formed, corresponding to FIGS. 2 and 3.

Regarding the types of semiconductors to be formed, in addition to St, others include Ge of group II, 5ixClx (0< x < 1 >
, 5ixGe 1x (Q<x<l), 5ixSn 1-
It goes without saying that x(0<x<1>) may be a single layer or a multilayer, and in addition to these, a compound semiconductor such as GaAs, GaAlAs+BP, or CdS may be used.

The present invention demonstrated a multi-chamber PCVD method using three reaction vessels. However, this was used as a single reaction vessel, where silicon nitride was mixed with silane (SiH) using the PCVO method.
+ or PC with 5itH () and ammonia (NHj)
Formation by VD reaction is effective.

It is also effective to form silicon oxide by a PCVD reaction of silane with N□o.

Also, add 5nCl of tin oxide! It is also effective to form ITO by a plasma vapor phase method using InCl, , 5nCIf and oxygen by PCVD reaction with element (22).

The non-single crystal semiconductor film formed according to the present invention is also effective for N (source), I (channel forming region), N (drain) junctions or PIF junctions in insulated field effect semiconductor devices. Furthermore, it is a PIN diode and the energy band is W-N-W (WIDE-NAL).
LOW-WIDE) or 5ixCI-X-3 amount-5i
A PIN junction type visible light laser, light emitting element, or photoelectric conversion device having an xC1-x (0<x<1) structure may be manufactured. In particular, the so-called W (P or N type)-N (
We believe that this is an extremely important technology from an industrial perspective, as it has become possible to independently manufacture and stack products of different conductivity types in each reaction chamber (WIDETONALLOW). do.

In the present invention, the separation part is not just a gate valve;
It was effective to provide two gate valves and one buffer chamber as system 2 to further prevent impurities of the P-type semiconductor from entering the summer semiconductor (23) body layer and to improve the characteristics.

It goes without saying that the plasma CVD apparatus of the present invention can be applied to multi-chamber systems with other structures.

The electric fields are shown as a pair in the vertical direction. However, it is also possible to provide another pair of electric fields orthogonal to the upper and lower electric fields.

Further, the embodiment of the present invention was of a multi-chamber type as shown in FIG. 2, and the PCVD method was supplied to all the reaction vessels. However, if necessary, a composite film may be formed by employing a photo-CVD method or LT CVD method (also referred to as HOMOCVD method) that does not use plasma.

[Brief explanation of drawings]

FIG. 1 shows the non-uniformity of film thickness on a substrate obtained by a conventional method. FIGS. 2 and 3 schematically show a plasma gas phase coating manufacturing apparatus for carrying out the present invention. FIG. 4 shows the uniformity of the thickness of the film (24) on the substrate obtained by the method of the present invention. Patent applicant (25)

Claims (1)

[Claims] 1. A plurality of substrates are arranged at regular intervals in a reaction container, opening/closing means are provided in front and rear of the reaction container, and heating means provided in the means A plasma vapor phase reaction apparatus characterized in that the substrate is heated. 2. A plasma vapor phase reactor according to claim 1, wherein the reaction space in which the substrate is disposed is surrounded by an insulator. 3. A plasma vapor phase reaction production apparatus according to claim 1, characterized in that a lamp heater serving as a heating means is provided so that radiant heat is supplied parallel to the surface on which the substrate is formed. 4. A plasma vapor phase reactor according to claim 2, characterized in that the lamp heaters of the pair of heating surfaces are disposed orthogonal to each other. (1)