JPS60109346A - Fault protecting circuit - Google Patents
Fault protecting circuitInfo
- Publication number
- JPS60109346A JPS60109346A JP58216153A JP21615383A JPS60109346A JP S60109346 A JPS60109346 A JP S60109346A JP 58216153 A JP58216153 A JP 58216153A JP 21615383 A JP21615383 A JP 21615383A JP S60109346 A JPS60109346 A JP S60109346A
- Authority
- JP
- Japan
- Prior art keywords
- transmission
- circuit
- reception
- receiver
- signal transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、例えば、データ端末システムに使用される信
号伝送装置の障害保護回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a fault protection circuit for a signal transmission device used, for example, in a data terminal system.
従来の実施例を第１図に示す。第１図に於いて信号伝送
装置１の送信信号線２は、前置ドライバ１１１ 、１２
１ 、１３１に分配し、各々の伝送送受信部２１ 、２
２ 、２３のトランスミンク回路２１１゜２２１ ’、
２３１を経由し１．伝送路２１１α、２２１α、２ろ
１αへ送られる。一方、伝送路２１２α、２２２α、２
３２αからの受信信号は、各々のレシーバ回路２１２゜
２２２ 、２３２および前置レシーバを経由し、オア回
路１０１によって受信信号線３へ受信される。A conventional embodiment is shown in FIG. In FIG. 1, the transmission signal line 2 of the signal transmission device 1 includes front drivers 111 and 12.
1, 131, and each transmission transmitter/receiver section 21, 2
2, 23 transmink circuits 211°221',
1 via 231. The signals are sent to transmission paths 211α, 221α, and 2 to 1α. On the other hand, transmission lines 212α, 222α, 2
The received signal from 32α passes through each receiver circuit 212, 222, 232 and a pre-receiver, and is received by the OR circuit 101 onto the receive signal line 3.
このような信号伝送装置では、伝送送受信部２１のレシ
ーバ回路２１２等の障害により、受信信号がオンしつづ
けた場合、オア回路１０１によって受信信号線６の出力
もオン状態となり、正常な、伝送路からの受信が不可能
になるという欠点があった。In such a signal transmission device, if the received signal continues to be turned on due to a failure in the receiver circuit 212 or the like of the transmission transmitting/receiving section 21, the output of the received signal line 6 is also turned on by the OR circuit 101, and the normal transmission line is turned on. The disadvantage was that it became impossible to receive data from
本発明の目的は、このような従来方式の欠点を改良し、
異常なデータ送出を行なう、伝送路や伝送送受信部から
の入力を禁止し、他の伝送路からのデータ受信に影響を
与えないような障害保護回路を提供することにある。The purpose of the present invention is to improve the drawbacks of such conventional methods,
It is an object of the present invention to provide a failure protection circuit which prohibits input from a transmission line or transmission/receiver section that sends abnormal data, and does not affect data reception from other transmission lines.
本発明は、障害が発生した伝送路や伝送送受信部からの
影響を、障害発生元の近傍でくい止め、他の伝送路のデ
ータ受信に影響を与えないようにするものである。The present invention is intended to suppress the influence of a faulty transmission line or transmission transmitting/receiving unit in the vicinity of the faulty source, so as not to affect data reception on other transmission lines.
以下、本発明の一実施例を第２図により説明する。第２
図に於いて、信号伝送装置１の送信信号線２は、ビット
対応の伝送系ランチ回路２０１の出力でゲートされた前
置ドライバＮ、４１．５１に分配し、各々の伝送送受信
部２１ 、２２ 、２３のトランスミッタ回路２１１
、２２１ 、２３１を経由し、伝送路２１１α、２２１
α、２３１αへ送られる。一方、伝送路２１２α、２２
２α、２６２αからの受信信号は各々のレシーバ回路２
１２ 、２２２ 、２３２を経由し、ビット対応の伝送
系ラッチ回路２０１の出力でゲートされた前置レシーバ
を経て、オア回路１０１によって受信信号線６へ受信さ
れる。いま、伝送送受信部２１の障害が発生した場合、
伝送系ラッチ回路によってゲートされた前置レシーバ３
２を禁止することにより、伝送送受信部２２および２３
からの受信データは伝送送受信部２１の障害の影響を受
けることなく正常に受信することが可能さなる。なお本
実施例によれば、ある特定の伝送送受信部のトランスミ
ッタ回路、レシーバ回路あるいは伝送路を個別に障害の
有無を診断することが可能となる。即ち、前記障害の伝
送送受信部２１のレシーバ回路２１２の良否を判定する
場合、正常な伝送送受信部のトランスミッタ回路、例え
ば伝送送受信部２２のトランスミンク回路２２１ （！
：、ループ状に接続（伝送路２２１ａ と２１２ａを接
続）し、前置トランスミッタ４１および前置レシーバ５
２をゲートする伝送系ランチ回路のみを許可状態にして
、送信信号線２、前置トランスミッタ４１．１−ランス
ミッタ回路２２１、伝送路２２１ ａ 、伝送路２１２
ａ、 レシーバ回路２１２、前置レシーバ６２、オア回
路１０１、受信信号線乙の経路にてデータチーソクを実
施することでレシーバ回路２１２の良否が判断可能とな
る。このようにビット対応を有する伝送系ランチ回路を
オン、オフすることで障害保護あるいは障害発見を可能
とする。An embodiment of the present invention will be described below with reference to FIG. Second
In the figure, the transmission signal line 2 of the signal transmission device 1 is distributed to the pre-driver N, 41.51 gated by the output of the bit-compatible transmission system launch circuit 201, and the transmission signal line 2 of the signal transmission device 1 is distributed to the pre-driver N, 41. , 23 transmitter circuit 211
, 221, 231, transmission lines 211α, 221
α, sent to 231α. On the other hand, transmission lines 212α, 22
The received signals from 2α and 262α are sent to each receiver circuit 2.
12, 222, and 232, and a pre-receiver gated by the output of the transmission latch circuit 201 corresponding to the bit, and is received by the OR circuit 101 onto the reception signal line 6. Now, if a failure occurs in the transmission transmitter/receiver 21,
Pre-receiver 3 gated by transmission latch circuit
2, the transmission transmitting/receiving sections 22 and 23
The data received from the transmitter/receiver 21 can be received normally without being affected by a failure of the transmitter/receiver 21. According to this embodiment, it is possible to individually diagnose the presence or absence of a failure in the transmitter circuit, receiver circuit, or transmission path of a particular transmission/reception unit. That is, when determining the quality of the receiver circuit 212 of the faulty transmission transmitter/receiver 21, the transmitter circuit of the normal transmitter/receiver, for example, the transmink circuit 221 of the transmitter/receiver 22 (!
:, connected in a loop (transmission lines 221a and 212a are connected), front transmitter 41 and front receiver 5
2, the transmission signal line 2, the front transmitter 41.1-transmitter circuit 221, the transmission line 221a, and the transmission line 212.
a. By performing a data check on the path of the receiver circuit 212, pre-receiver 62, OR circuit 101, and reception signal line O, it is possible to determine whether the receiver circuit 212 is good or bad. By turning on and off transmission system launch circuits having bit correspondence in this way, it is possible to protect against faults or discover faults.
［発明の効果〕
本発明によれば、複数の伝送系より構成される端末シス
テムに於いて、ある伝送送受信部あるいは伝送路に障害
が発生しても、他の伝送系の受信に影響を与えず端末シ
ステム系の縮退運用が可能となる。また特定の伝送系、
トランスミッタ回路あるいはレシーバ回路のみを禁止あ
るいは許可することで伝送路での障害切り分け、回路診
断等を可能とする。本発明によれば、伝送系ラッチ回路
、ゲート回路を追加することで、障害保護、障害探索を
容易にし、これにょる経済的効果が大である。[Effects of the Invention] According to the present invention, in a terminal system composed of a plurality of transmission systems, even if a failure occurs in one transmission/reception unit or transmission path, it does not affect reception in other transmission systems. This enables degenerate operation of terminal systems. Also, specific transmission systems,
Prohibiting or permitting only the transmitter circuit or receiver circuit makes it possible to isolate faults in the transmission path, diagnose circuits, etc. According to the present invention, by adding a transmission system latch circuit and a gate circuit, failure protection and failure search are facilitated, and this has a large economical effect.
第１図は従来の実施例を示す回路図、第２図は本発明の
一実施例の回路図である。
１・・・信号伝送装置、２・・・送信信号線、３．６・
受信信号線。
（。
代理人弁理士 高 橋 明 夫 ７FIG. 1 is a circuit diagram showing a conventional embodiment, and FIG. 2 is a circuit diagram of an embodiment of the present invention. 1... Signal transmission device, 2... Transmission signal line, 3.6.
Receive signal line. (Representative Patent Attorney Akio Takahashi 7
Claims (1)
数の信号伝送系に分配接続および複数の信号伝送系を論
理和接続する手段とを含む信号伝送装置に於いて、前記
、分配接続および論理和接続手段の入力側に信号伝送系
の各々に対応して設けられたゲート手段と信号伝送系毎
に伝送系を保持する記憶手段を有し、前記ゲート手段の
開閉を制御するように構成したことを特徴さする障害保
護回路。1. In a signal transmission device including a plurality of signal transmission systems provided separately, means for distributing connection to the plurality of signal transmission systems and means for OR-connecting the plurality of signal transmission systems, the above-mentioned distribution connection and logic The input side of the sum connection means has gate means provided corresponding to each of the signal transmission systems and storage means for storing the transmission system for each signal transmission system, and is configured to control opening and closing of the gate means. A fault protection circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58216153A JPS60109346A (en) | 1983-11-18 | 1983-11-18 | Fault protecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58216153A JPS60109346A (en) | 1983-11-18 | 1983-11-18 | Fault protecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60109346A true JPS60109346A (en) | 1985-06-14 |
Family
ID=16684111
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58216153A Pending JPS60109346A (en) | 1983-11-18 | 1983-11-18 | Fault protecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60109346A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1993011620A1 (en) * | 1991-12-02 | 1993-06-10 | The Furukawa Electric Co., Ltd. | Method for recovering failured transmission line |
-
1983
- 1983-11-18 JP JP58216153A patent/JPS60109346A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1993011620A1 (en) * | 1991-12-02 | 1993-06-10 | The Furukawa Electric Co., Ltd. | Method for recovering failured transmission line |
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