JPH08163153A - Bus type duplex transmission device - Google Patents

Bus type duplex transmission device

Info

Publication number
JPH08163153A
JPH08163153A JP6301749A JP30174994A JPH08163153A JP H08163153 A JPH08163153 A JP H08163153A JP 6301749 A JP6301749 A JP 6301749A JP 30174994 A JP30174994 A JP 30174994A JP H08163153 A JPH08163153 A JP H08163153A
Authority
JP
Japan
Prior art keywords
transmission
output
circuit
transmission line
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6301749A
Other languages
Japanese (ja)
Other versions
JP3221259B2 (en
Inventor
Noriaki Katsumata
憲明 勝俣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP30174994A priority Critical patent/JP3221259B2/en
Publication of JPH08163153A publication Critical patent/JPH08163153A/en
Application granted granted Critical
Publication of JP3221259B2 publication Critical patent/JP3221259B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the cost and to improve the performance of a bus type duplex transmission device by discriminating a normal transmission line system from the abnormal one and transmitting simultaneously plural data to a node through the normal transmission line system. CONSTITUTION: The A and B system transmission lines 1a and 1b are connected to the nodes where the transmitters 4a and 4b and the receivers 5a and 5b are connected to both lines 1a and 1b. An abnormality detection circuit 6 is connected to the input stages of receivers 5a and 5b together with a system selector 8 connected to the output stages of both receivers respectively. A system switch control circuit 7 is provided on the output stage of the circuit 6 and the transmission data are sent at a time to both systems A and B in a normal mode. If the line 1a or 1b has a fault, the data added to the faulty line and the output level of an LPF 11 exceeds the normal value. Thus the output of a NAND gate 13 has a high level and this high output is inputted to a flip-flop 16. Thus an abnormality detection signal is outputted to the circuit 7 which instructs the selector 8 to select the system to be received and then to switch the circuit 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はバス型伝送装置に係り、
特にバス型二重化伝送装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus type transmission device,
In particular, it relates to a bus type duplex transmission device.

【0002】[0002]

【従来の技術】図9は従来のバス型伝送装置を示し、同
図において1は伝送路、2a,2bは終端抵抗などから
なるターミネータ、3a,3nはノード、4a,4nは
送信器(TX)、5a,5nは受信器(RX)である。
各ノードには送信器(TX)と受信器(RX)が在り、
共通の伝送路を介して伝送を行う。
2. Description of the Related Art FIG. 9 shows a conventional bus type transmission device. In FIG. 9, 1 is a transmission line, 2a and 2b are terminators composed of terminating resistors, 3a and 3n are nodes, and 4a and 4n are transmitters (TX). ) 5a and 5n are receivers (RX).
Each node has a transmitter (TX) and a receiver (RX),
Transmission is performed via a common transmission line.

【0003】[0003]

【発明が解決しようとする課題】あるノードが故障し異
常なデータ等を送信し続けた場合、他のノードが故障し
異常なデータが衝突し、相手を通信する事ができない。
つまり1ノードの故障がネットワーク全体のダウンにな
っていた。従って、バス型伝送路の場合、1ケ所の故障
が全体に波及する可能性があり、信頼性を求められる用
途の場合、伝送路の二重化等の必要がある。
When a node fails and continues to send abnormal data or the like, another node fails and abnormal data collides, making it impossible to communicate with the other party.
In other words, the failure of one node caused the entire network to go down. Therefore, in the case of the bus type transmission line, a failure at one location may spread to the whole, and in the case where the reliability is required, it is necessary to duplicate the transmission line.

【0004】当然の事であるが、伝送装置を二重化すれ
ば、コストも倍になり、さらに二重化した伝送装置より
のデータの処理のハードウェア,ソフトウェア共複雑に
なり、当然コストアップになる。
As a matter of course, if the transmission device is duplicated, the cost is also doubled, and the hardware and software for data processing by the duplicated transmission device are complicated, which naturally raises the cost.

【0005】本発明は上述の問題点に鑑みてなされたも
ので、その目的は二重化されたバス型伝送路に同時にデ
ータ送信し、正常な系よりデータを取り込むことによ
り、低コストにして高性能な二重化バス型伝送装置を提
供することである。
The present invention has been made in view of the above problems, and an object thereof is to simultaneously transmit data to a duplicated bus type transmission line and take in data from a normal system, thereby reducing the cost and improving the performance. Another object of the present invention is to provide a redundant bus type transmission device.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明のバス型二重化伝送装置は、二重化されたバ
ス型伝送路にそれぞれ接続された送信回路と受信回路を
有するノードを接続してなる伝送装置において、前記ノ
ードに、送信データを前記各バス型伝送路に送信データ
を同時に送信する手段と、異常な伝送路系と正常な伝送
路系を識別する異常検出回路手段と、該異常検出回路手
段の判断にもとづく正常な伝送路系よりデータを取り込
む手段、によって構成したことを特徴とする。また、前
記ノードに、前記各バス型伝送路を電流駆動する手段を
設ける。
In order to achieve the above-mentioned object, a bus type duplex transmission apparatus of the present invention connects a node having a transmission circuit and a reception circuit respectively connected to a duplexed bus type transmission line. In the transmission device, means for simultaneously transmitting transmission data to each of the bus type transmission lines to the node, abnormality detection circuit means for discriminating between an abnormal transmission line system and a normal transmission line system, It is constituted by means for fetching data from a normal transmission line system based on the judgment of the abnormality detection circuit means. Further, the node is provided with means for current-driving each of the bus type transmission lines.

【0007】[0007]

【作用】バス型伝送路を2本持ち各伝送路に送・受信回
路と、異常検出回路を有し、送信データは両系に同時に
送信し、正常な系を異常検出回路により判断し、正常な
系よりデータを取り込む事で伝送路の二重化を行う。
[Function] Two bus type transmission lines are provided, and each transmission line has a transmission / reception circuit and an abnormality detection circuit. Transmitted data is transmitted to both systems at the same time. By duplicating the transmission line by taking in the data from a different system.

【0008】さらに、伝送路上での異常監視を容易とす
る為に伝送路を電流駆動し、伝送路上での衝突,オープ
ン,ショート等の検出を可能とする。
Further, in order to facilitate the monitoring of the abnormality on the transmission line, the transmission line is current-driven, and it is possible to detect a collision, an open, a short circuit or the like on the transmission line.

【0009】[0009]

【実施例】以下に本発明の実施例を図1〜図8を参照し
ながら説明する。
Embodiments of the present invention will be described below with reference to FIGS.

【0010】図1は本発明を適用するバス型二重化伝送
装置を示すもので、A系伝送路1aとB系伝送路1bに
はそれぞれノード3a,3b,…3nが接続されてお
り、各ノードはそれぞれ図1に示すように構成される。
FIG. 1 shows a bus-type duplex transmission device to which the present invention is applied. Nodes 3a, 3b, ... 3n are connected to the A-system transmission line 1a and the B-system transmission line 1b, respectively. Are configured as shown in FIG.

【0011】すなわち、図1に示すように、各ノードに
おいては伝送路1a,1bに、それぞれ、送信器4a,
4bおよび受信器5a,5bが接続されており、受信器
5a,5bの入力段にはそれぞれ異常検出回路6a,6
bが接続されている。また、受信器5aと5bの出力段
には系選択器8が接続され、異常検出回路6aと6bの
出力段には系切換制御回路7が接続されている。
That is, as shown in FIG. 1, in each node, the transmission lines 1a and 1b are respectively connected to the transmitters 4a and 4b.
4b and the receivers 5a and 5b are connected, and the abnormality detection circuits 6a and 6 are respectively provided at the input stages of the receivers 5a and 5b.
b is connected. A system selector 8 is connected to the output stages of the receivers 5a and 5b, and a system switching control circuit 7 is connected to the output stages of the abnormality detection circuits 6a and 6b.

【0012】図1の装置において、送信データはA,B
両系に同時に送信される。各受信器には伝送路の異常検
出部があり、これらによる伝送路の異常情報により系切
換制御回路7は系選択器8に受信する系を選択させる。
In the apparatus of FIG. 1, the transmission data are A and B.
It is sent to both systems at the same time. Each receiver has a transmission path abnormality detection unit, and the system switching control circuit 7 causes the system selector 8 to select the system to be received based on the transmission path abnormality information.

【0013】図3は異常検出部6a(6b)の回路構成
を示すもので、9は送信データを電流信号に変換する電
流変換器、10は受信器5aの入力段に接続されたキャ
リア検出(CD)回路、11は同じく受信器5aの入力
段に接続されたローパスフィルタ(LPF)である。1
2はLPF11の出力信号としきい値電圧VTHを入力
とするコンパレータ、13はCD検出回路10の出力信
号とコンパレータ12の出力信号を入力とするナンドゲ
ート、14はオアゲート、15はノットゲート、16は
オアゲート14の出力とノットゲート15の出力を入力
とするフリップフロップである。
FIG. 3 shows a circuit configuration of the abnormality detecting section 6a (6b). Reference numeral 9 is a current converter for converting transmission data into a current signal, and 10 is carrier detection (connected to the input stage of the receiver 5a). The CD) circuit 11 is a low-pass filter (LPF) also connected to the input stage of the receiver 5a. 1
2 is a comparator that receives the output signal of the LPF 11 and the threshold voltage VTH; 13 is a NAND gate that receives the output signal of the CD detection circuit 10 and the output signal of the comparator 12; 14 is an OR gate; 15 is a NOT gate; 16 is an OR gate It is a flip-flop that receives the output of 14 and the output of the NOT gate 15.

【0014】図3の異常検出回路において、送信データ
は電流変換器9により電流変換され、電流駆動される。
CD検出は受信キャリアの検出であり、図4に示すよう
に、装置の正常時にはCDが検出される。LPF11は
レベル検出を行うものであり、このLPF11のレベル
検出信号としきい値信号はコンパレータ12で比較され
る。ナンドゲート13にはコンパレータ12の出力信号
とCD検出器のCD検出信号が入力される。オアゲート
14はナンドゲート13の出力信号を一入力とし、オア
ゲート14の出力信号はフリップフロップ15に入力さ
れる。また、ノットゲート15には送信データが入力さ
れ、このノットゲート15の出力信号はフリップフロッ
プ16に入力され、フリップフロップ16の出力信号は
異常検出信号となるとともに、オアゲート14に入力さ
れる。
In the abnormality detection circuit of FIG. 3, the transmission data is converted into a current by the current converter 9 and is current-driven.
The CD detection is the detection of the received carrier, and as shown in FIG. 4, the CD is detected when the device is normal. The LPF 11 detects the level, and the level detection signal of the LPF 11 and the threshold signal are compared by the comparator 12. The output signal of the comparator 12 and the CD detection signal of the CD detector are input to the NAND gate 13. The OR gate 14 receives the output signal of the NAND gate 13 as one input, and the output signal of the OR gate 14 is input to the flip-flop 15. Further, transmission data is input to the NOT gate 15, an output signal of the NOT gate 15 is input to the flip-flop 16, and an output signal of the flip-flop 16 becomes an abnormality detection signal and is also input to the OR gate 14.

【0015】伝送路上でデータが衝突した場合、図5に
示すように、伝送路は電流駆動されているため、データ
が加算される。このため、LPF11の出力レベルも正
常時の値を越え、コンパレータ11の出力は低レベル
「0」となり、ナンドゲート13の出力が高レベルとな
る。ナンドゲート13の出力はオアゲート14を通して
フリップフロップ16に入力され、フリップフロップ1
6は異常検出信号を出力する。
When data collides on the transmission line, the data is added because the transmission line is current-driven as shown in FIG. Therefore, the output level of the LPF 11 also exceeds the normal value, the output of the comparator 11 becomes low level “0”, and the output of the NAND gate 13 becomes high level. The output of the NAND gate 13 is input to the flip-flop 16 through the OR gate 14, and the flip-flop 1
6 outputs an abnormality detection signal.

【0016】伝送路がショートしている場合、図6に示
すようにCD検出が無いのでコンパレータ12の出力の
みがナンドゲート13に入力され、このナンドゲート1
3の出力は高レベルになり、この出力信号はオアゲート
14を通してフリップフロップ16に入力され、該フリ
ップフロップ16から異常検出信号が出力される。
When the transmission line is short-circuited, there is no CD detection as shown in FIG. 6, so only the output of the comparator 12 is input to the NAND gate 13.
The output of 3 becomes high level, this output signal is input to the flip-flop 16 through the OR gate 14, and the abnormality detection signal is output from the flip-flop 16.

【0017】伝送路がオープンの場合、送信が電流駆動
であるため、図7に示すように、送信レベルが異常に大
きくなり、コンパレータ12の出力が高レベルでありC
D検出信号が無いので、ナンドゲート13の出力が高レ
ベルになる。ナンドゲート13の高レベル出力信号はフ
リップフロップ16に入力され、該フリップフロップ1
6は異常検出信号を出力する。
When the transmission line is open, the transmission is current-driven, so that the transmission level becomes abnormally high and the output of the comparator 12 is at a high level as shown in FIG.
Since there is no D detection signal, the output of the NAND gate 13 becomes high level. The high level output signal of the NAND gate 13 is input to the flip-flop 16 and the flip-flop 1
6 outputs an abnormality detection signal.

【0018】図3の異常検出部において、フリップフロ
ップ16はエラーのラッチであり、いまフリップフロッ
プ16が高レベルで異常とすると、送信開始前に異常検
出クリアによりフリップフロップ16をクリアする。フ
リップフロップ16の出力信号は、CD検出回路10の
CD検出信号が高レベル「H」でコンパレータ12の出
力信号が高レベル「H」の時のみ、低レベル「L」とな
り、それ以外は高レベル「H」となる。また、オアゲー
ト14により、フリップフロップ16の出力信号が一度
高レベル「H」となったらクリアされない限り、フリッ
プフロップ16は高レベル信号を出力し、異常を検出す
る。
In the abnormality detecting unit of FIG. 3, the flip-flop 16 is an error latch, and if the flip-flop 16 is abnormal at a high level, the flip-flop 16 is cleared by abnormality detection clear before transmission is started. The output signal of the flip-flop 16 becomes the low level "L" only when the CD detection signal of the CD detection circuit 10 is at the high level "H" and the output signal of the comparator 12 is at the high level "H", and is otherwise at the high level. It becomes "H". Further, unless the output signal of the flip-flop 16 once becomes the high level "H" by the OR gate 14, it is cleared, the flip-flop 16 outputs the high level signal and detects the abnormality.

【0019】図1のバス型二重化伝送装置において、系
切換は図8のアルゴリズムによって実行される。すなわ
ち、図8に示すように、ステップS1で例えばA系を選
択し、ステップS2で異常検出クリアを行う。異常検出
のクリアを行った後に、ステップS3で送信を行う。次
にステップS4で送電系路が正常であるか否かを判定す
る。送電系路が正常であればステップS2に戻る。送電
系路が正常であれば、ステップS5に進み両系が異常で
あるか否かを判断し、両系とも異常であればステップS
7に進み異常発生と判定する。ステップS5で両系とも
異常でなければ、ステップS6に進み、系の切換を行い
その後ステップS2に戻る。このようにして、伝送路異
常が発生しても正常な系を選択して伝送が行われる。
In the bus type duplex transmission apparatus of FIG. 1, system switching is executed by the algorithm of FIG. That is, as shown in FIG. 8, for example, system A is selected in step S1, and abnormality detection is cleared in step S2. After clearing the abnormality detection, transmission is performed in step S3. Next, in step S4, it is determined whether or not the power transmission system path is normal. If the power transmission path is normal, the process returns to step S2. If the power transmission system path is normal, the process proceeds to step S5 to determine whether both systems are abnormal. If both systems are abnormal, step S5 is performed.
It progresses to 7 and determines that an abnormality has occurred. If neither system is abnormal in step S5, the process proceeds to step S6, the systems are switched, and then the process returns to step S2. In this way, even if a transmission path abnormality occurs, a normal system is selected and transmission is performed.

【0020】[0020]

【発明の効果】本発明は、上述の如くであって、バス型
の伝送装置において伝送路上で送信データの衝突,オー
プン,ショート等の異常に対して保護が可能となり信頼
性が向上するとともに、伝送装置を含めて二重化する場
合と比較して、ハードウェア,ソフトウェアともコスト
アップがなくなり安価なバス型二重化伝送装置が得られ
る。
As described above, the present invention is capable of protecting a bus type transmission device from an abnormality such as a collision, an open or a short of transmission data on a transmission line, thereby improving reliability and Compared with the case of duplication including the transmission device, the cost of hardware and software is not increased, and an inexpensive bus type duplication transmission device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例によるバス型二重化伝送装置の
ブロック図。
FIG. 1 is a block diagram of a bus type duplex transmission device according to an embodiment of the present invention.

【図2】本発明を適用するバス型二重化伝送装置の概略
構成図。
FIG. 2 is a schematic configuration diagram of a bus-type duplex transmission device to which the present invention is applied.

【図3】本発明の実施例によるバス型二重化伝送装置の
異常検出回路のブロック図。
FIG. 3 is a block diagram of an abnormality detection circuit of a bus type duplex transmission device according to an embodiment of the present invention.

【図4】図3の異常検出回路の検出タイミング図。FIG. 4 is a detection timing chart of the abnormality detection circuit of FIG.

【図5】図3の異常検出回路の検出タイミング図。5 is a detection timing chart of the abnormality detection circuit of FIG.

【図6】図3の異常検出回路の検出タイミング図。FIG. 6 is a detection timing chart of the abnormality detection circuit of FIG.

【図7】図3の異常検出回路の検出タイミング図。7 is a detection timing chart of the abnormality detection circuit of FIG.

【図8】本発明の実施例によるバス型二重化伝送装置の
系切換アルゴリズムを示す動作フローチャート。
FIG. 8 is an operation flowchart showing a system switching algorithm of the bus type duplex transmission device according to the embodiment of the present invention.

【図9】従来の伝送装置の概略構成を示すブロック図。FIG. 9 is a block diagram showing a schematic configuration of a conventional transmission device.

【符号の説明】[Explanation of symbols]

1a,1b…バス型伝送路 3a,3b…3n…ノード 4a,4b…送信器 5a,5b…受信器 6a,6b…異常検出回路 7…系切換制御回路 8…系選択器 9…電流変換器 10…キャリア検出器 11…ローパスフィルタ 12…コンパレータ 13…ナンドゲート 14…オアゲート 15…ノットゲート 16…フリップフロップ 1a, 1b ... Bus type transmission path 3a, 3b ... 3n ... Nodes 4a, 4b ... Transmitter 5a, 5b ... Receiver 6a, 6b ... Abnormality detection circuit 7 ... System switching control circuit 8 ... System selector 9 ... Current converter 10 ... Carrier detector 11 ... Low-pass filter 12 ... Comparator 13 ... NAND gate 14 ... OR gate 15 ... Not gate 16 ... Flip-flop

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 二重化されたバス型伝送路にそれぞれ接
続された送信回路と受信回路を有するノードを接続して
なる伝送装置において、前記ノードに、送信データを前
記各バス型伝送路に送信データを同時に送信する手段
と、異常な伝送路系と正常な伝送路系を識別する異常検
出回路手段と、該異常検出回路手段の判断にもとづく正
常な伝送路系よりデータを取り込む手段、によって構成
したことを特徴とするバス型二重化伝送装置。
1. A transmission device comprising a node having a transmission circuit and a reception circuit, which are respectively connected to a duplicated bus type transmission line, in which transmission data is transmitted to the node and transmission data is transmitted to each of the bus type transmission lines. Of the abnormal transmission line system and the abnormal transmission line system for distinguishing between the abnormal transmission line system and the normal transmission line system, and means for taking in data from the normal transmission line system based on the judgment of the abnormality detection circuit unit. A bus-type duplex transmission device characterized in that
【請求項2】 請求項第1項のバス型二重化伝送装置に
おいて、前記ノードに、前記各バス型伝送路を電流駆動
する手段を設けた、ことを特徴とするバス型二重化伝送
装置。
2. The bus-type duplex transmission device according to claim 1, wherein the node is provided with means for driving the respective bus-type transmission lines with current.
JP30174994A 1994-12-06 1994-12-06 Bus type duplex transmission equipment Expired - Fee Related JP3221259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30174994A JP3221259B2 (en) 1994-12-06 1994-12-06 Bus type duplex transmission equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30174994A JP3221259B2 (en) 1994-12-06 1994-12-06 Bus type duplex transmission equipment

Publications (2)

Publication Number Publication Date
JPH08163153A true JPH08163153A (en) 1996-06-21
JP3221259B2 JP3221259B2 (en) 2001-10-22

Family

ID=17900708

Family Applications (1)

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JP30174994A Expired - Fee Related JP3221259B2 (en) 1994-12-06 1994-12-06 Bus type duplex transmission equipment

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011097436A (en) * 2009-10-30 2011-05-12 Hitachi Ltd Communication control device, motor multi-relay, and controller
JP2012014218A (en) * 2010-06-29 2012-01-19 Fujitsu Semiconductor Ltd Bus system including bus for a plurality of protocols and bus switch devices used in the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011097436A (en) * 2009-10-30 2011-05-12 Hitachi Ltd Communication control device, motor multi-relay, and controller
JP2012014218A (en) * 2010-06-29 2012-01-19 Fujitsu Semiconductor Ltd Bus system including bus for a plurality of protocols and bus switch devices used in the same

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