JP3221259B2 - Bus type duplex transmission equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus type transmission device,
Particularly, the present invention relates to a bus-type duplex transmission device.

[0002]

2. Description of the Related Art FIG. 9 shows a conventional bus-type transmission apparatus, in which 1 is a transmission line, 2a and 2b are terminators composed of a terminating resistor, 3a and 3n are nodes, and TX is a transmission line.
And RX is a receiver . Transmitter (TX) for each node
And a receiver (RX), and perform transmission via a common transmission path.

[0003]

When a node fails and continues transmitting abnormal data, the other node fails and abnormal data collides, making it impossible to communicate with the other party.
That is, the failure of one node has caused the entire network to go down. Therefore, in the case of a bus-type transmission line, there is a possibility that a failure at one place may spread to the whole, and in an application requiring reliability, it is necessary to duplicate the transmission line.

As a matter of course, if the transmission device is duplicated, the cost is doubled, and the hardware and software for processing data from the duplicated transmission device are both complicated, which naturally increases the cost.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and has as its object to simultaneously transmit data to a duplexed bus-type transmission line and take in data from a normal system, thereby reducing cost and improving performance. It is to provide a simple duplex bus type transmission device.

[0006]

In order to achieve the above object, a bus-type duplex transmission apparatus according to the present invention connects a node having a transmission circuit and a node having a reception circuit respectively connected to a duplex bus-type transmission line. A transmission device configured to simultaneously transmit transmission data to each of the bus-type transmission lines to the node; an abnormality detection circuit unit that identifies an abnormal transmission line system and a normal transmission line system; Means for taking in data from a normal transmission line system based on the judgment of the abnormality detection circuit means, wherein the abnormality detection circuit means
Current driving means for current driving a transmission path, and the bus-type transmission
State detecting circuit means for detecting a state of a road;
Compare the level detection signal and threshold value according to the state of the transmission line
Comparing means, the transmission data, and the state detection circuit
Means and a comparison signal of the comparing means.
Logical operation based on the signal and the presence or absence of abnormality in the bus-type transmission path
Logic operation means for detecting

[0007]

[Function] Each transmission line has two bus-type transmission lines, and each transmission line has a transmission / reception circuit and an abnormality detection circuit. Transmission data is simultaneously transmitted to both systems, and a normal system is determined by the abnormality detection circuit. The transmission path is duplicated by taking in data from an appropriate system.

Further, in order to facilitate the monitoring of abnormalities on the transmission line, the transmission line is driven by a current to detect a collision, an open circuit, a short circuit or the like on the transmission line.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 shows a bus-type duplex transmission apparatus to which the present invention is applied . As shown in FIG.
And nodes 3a, 3b,.
n are connected, and each node is configured as shown in FIG.

That is, as shown in FIG. 1, in each node, the transmitters 4a and 4a are connected to the transmission lines 1a and 1b, respectively.
4b and receivers 5a and 5b are connected, and input terminals of the receivers 5a and 5b have abnormality detection circuits 6a and 6b, respectively.
b is connected. A system selector 8 is connected to output stages of the receivers 5a and 5b, and a system switching control circuit 7 is connected to output stages of the abnormality detection circuits 6a and 6b.

In the apparatus of FIG. 1, transmission data is A, B
Sent to both systems simultaneously. Each receiver has a transmission path abnormality detection unit, and the system switching control circuit 7 causes the system selector 8 to select the system to be received based on the transmission path abnormality information.

FIG. 3 shows a circuit configuration of the abnormality detecting section 6a (6b), 9 is a current converter for converting transmission data into a current signal, and 10 is a carrier detector (connected to the input stage of the receiver 5a). CD) circuit 11 is a low-pass filter (LPF) also connected to the input stage of the receiver 5a. 1
2 is a comparator which receives the output signal of the LPF 11 and the threshold voltage VTH as inputs, 13 is a NAND gate which receives the output signal of the CD detection circuit 10 and the output signal of the comparator 12, 14 is an OR gate, 15 is a NOT gate, 16 is an OR gate. This is a flip-flop that receives the output of the NOT gate 15 and the output of the NOT gate 15.

In the abnormality detecting circuit shown in FIG. 3, the transmission data is current-converted by the current converter 9 and is driven by current.
CD detection is detection of a received carrier, and as shown in FIG. 4, a CD is detected when the apparatus is normal. The LPF 11 performs level detection, and the level detection signal of the LPF 11 and a threshold signal are compared by a comparator 12. The output signal of the comparator 12 and the CD detection signal of the CD detector are input to the NAND gate 13. The OR gate 14 receives the output signal of the NAND gate 13 as one input, and the output signal of the OR gate 14 is input to the flip-flop 15. The transmission data is input to the NOT gate 15, the output signal of the NOT gate 15 is input to the flip-flop 16, and the output signal of the flip-flop 16 becomes the abnormality detection signal and is input to the OR gate 14.

When data collide on the transmission path, as shown in FIG. 5, the data is added because the transmission path is current-driven. Therefore, the output level of the LPF 11 also exceeds the normal value, the output of the comparator 12 becomes low level “0”, and the output of the NAND gate 13 becomes high level. The output of the NAND gate 13 is input to the flip-flop 16 through the OR gate 14, and the flip-flop 1
6 outputs an abnormality detection signal.

When the transmission path is short-circuited, since no CD is detected as shown in FIG. 6, only the output of the comparator 12 is input to the NAND gate 13, and this NAND gate 1
The output of the output 3 becomes high level, and this output signal is input to the flip-flop 16 through the OR gate 14, and the abnormality detection signal is output from the flip-flop 16.

When the transmission path is open, the transmission is current-driven, and as shown in FIG. 7, the transmission level becomes abnormally high, and the output of the comparator 12 is low and C
Since there is no D detection signal, the output of the NAND gate 13 goes high. The high level output signal of the NAND gate 13 is input to the flip-flop 16 and the flip-flop 1
6 outputs an abnormality detection signal.

In the abnormality detecting section of FIG. 3, the flip-flop 16 is an error latch. If the flip-flop 16 is abnormal at a high level, the flip-flop 16 is cleared by the abnormality detection clear before starting transmission. The output signal of the flip-flop 16 becomes low level only when the CD detection signal of the CD detection circuit 10 is high level "H" and the output signal of the comparator 12 is high level "H", and otherwise becomes high level. It becomes "H". Also, once the output signal of the flip-flop 16 becomes high level “H” by the OR gate 14, the flip-flop 16 outputs a high level signal and detects abnormality unless it is cleared.

In the duplex transmission apparatus of the bus type shown in FIG. 1, system switching is executed by the algorithm shown in FIG. That is, as shown in FIG. 8, for example, system A is selected in step S1, and abnormality detection clear is performed in step S2. After clearing the abnormality detection, transmission is performed in step S3. Next, in step S4, it is determined whether or not the transmission path is normal. If the transmission path is normal, the process returns to step S2. transmission
If the route is abnormal, the process proceeds to step S5, where it is determined whether or not both systems are abnormal.
Proceed to 7 to determine that an abnormality has occurred. If both systems are not abnormal in step S5, the process proceeds to step S6, the system is switched, and then the process returns to step S2. In this way, even if a transmission line abnormality occurs, a normal system is selected for transmission.

[0020]

According to the present invention, as described above, a node
At the same time, transmit data to each bus type transmission path
Transmission means, and identification of abnormal transmission line systems and normal transmission line systems
Differentiating abnormality detecting circuit means and judgment of the abnormality detecting circuit means
From the means to capture data from the normal transmission path system based on
And the abnormality detection circuit means supplies power to the bus-type transmission line.
Current driving means for current driving, and the state of the bus-type transmission path.
State detecting circuit means for detecting, and the state of the bus type transmission path
For comparing the level detection signal according to
Stage, the transmission data, and reception of the state detection circuit means.
Based on the carrier detection signal and the comparison signal of the comparing means
Performs logical operation to detect the presence or absence of an abnormality in the bus-type transmission path
A bus type duplex transmission device by means of logical operation means.
Therefore, protection against abnormalities such as collision of transmission data, transmission line open, short circuit, etc. on the transmission line is enabled, reliability is improved, and compared with the case of duplexing including the transmission device. Thus, there is no cost increase in hardware and software, and an inexpensive bus-type duplex transmission device can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of a bus-type duplex transmission device according to an embodiment of the present invention.

FIG. 2 is a schematic configuration diagram of a bus-type duplex transmission apparatus to which the present invention is applied.

FIG. 3 is a block diagram of an abnormality detection circuit of the bus-type duplex transmission device according to the embodiment of the present invention.

FIG. 4 is a detection timing chart of the abnormality detection circuit of FIG. 3;

FIG. 5 is a detection timing chart of the abnormality detection circuit of FIG. 3;

FIG. 6 is a detection timing chart of the abnormality detection circuit of FIG. 3;

FIG. 7 is a detection timing chart of the abnormality detection circuit of FIG. 3;

FIG. 8 is an operation flowchart showing a system switching algorithm of the bus type duplex transmission apparatus according to the embodiment of the present invention.

FIG. 9 is a block diagram showing a schematic configuration of a conventional transmission device.

[Explanation of symbols]

 1a, 1b: Bus-type transmission path 3a, 3b ... 3n: Node 4a, 4b: Transmitter 5a, 5b: Receiver 6a, 6b: Abnormality detection circuit 7: System switching control circuit 8: System selector 9: Current converter DESCRIPTION OF SYMBOLS 10 ... Carrier detector 11 ... Low-pass filter 12 ... Comparator 13 ... Nand gate 14 ... OR gate 15 ... Not gate 16 ... Flip-flop

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-288524 (JP, A) JP-A-2-199943 (JP, A) JP-A-62-171246 (JP, A) JP-A-4- 72937 (JP, A) JP-A-58-170140 (JP, A) JP-A-5-68043 (JP, A) JP-A-3-135122 (JP, A) JP-A-1-151164 (JP, U) Patent 3133490 (JP, B2) Patent 2988529 (JP, B2) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 12/40

Claims (1)

(57) [Claims] 1. Connecting to a duplicated bus-type transmission line
Connecting the nodes with the connected transmitting and receiving circuits
In the transmission device, transmission data is transmitted to the node in advance.
Means for simultaneously transmitting transmission data to each bus type transmission path
Error detection to distinguish between an abnormal transmission line system and a normal transmission line system.
Output circuit means and correctness based on the judgment of the abnormality detection circuit means.
Means to take in data from normal transmission path systemConsisting of The abnormality detection circuit means, Current driving means for current driving the bus-type transmission line; State detection circuit means for detecting the state of the bus type transmission path
When, A level detection signal corresponding to the state of the bus-type transmission path;
A comparison means for comparing the The transmission data and the reception carry of the state detection circuit means.
A logical operation based on the detection signal and the comparison signal of the comparing means.
Logical operation for detecting the presence or absence of an abnormality in the bus-type transmission path.
Arithmetic means,  Bus type duplex transmission device characterized by comprising
Place.