JP3016280B2 - In-device monitoring method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-device monitoring system,
In particular, the present invention relates to an in-device monitoring method used in a digital multiplexing terminal device and having a self-diagnosis function.

[0002]

2. Description of the Related Art In general, in an in-device monitoring system, a monitoring pattern signal is inserted into a transmitting side of a monitored device, and an error in the monitoring pattern signal is detected and monitored at a receiving side via a transmission line. Conventionally, this type of in-device monitoring method does not have a function of detecting an error generated by the monitoring device itself or detecting a device failure, that is, a self-diagnosis function.

[0003]

As described above, since the conventional example does not have a self-diagnosis function, it is difficult to know whether the error detection signal is actually generated by the monitored device or erroneously generated by the monitoring device. . In some cases, the monitoring device is used without knowing the undetectable state due to a failure. As described above, in the conventional example, there are problems with respect to error detection accuracy and reliability of the monitoring device.

[0004]

According to the in-device monitoring method of the present invention, a monitoring pattern transmitting apparatus for generating a monitoring pattern signal and transmitting the pattern signal to a transmission path via a monitored apparatus, and a monitoring pattern transmitting apparatus for transmitting the pattern signal from the transmission path. A monitoring pattern receiving device that receives the monitoring pattern signal via a monitoring device and detects a pattern error, wherein the monitoring pattern transmitting device generates a first monitoring pattern signal in a first monitoring mode. A pattern generation circuit, a second monitoring pattern generation circuit for generating a second monitoring pattern signal, and a selection circuit for alternately selecting and outputting the first monitoring pattern signal and the second monitoring pattern signal. A multiplexing circuit for superimposing an output signal of the selection circuit on a main signal of the monitored device, and the monitoring pattern receiving device includes a multiplexing circuit superimposed on the main signal. A first monitoring pattern error detection circuit for extracting a monitoring pattern signal, detecting a pattern error and outputting a first pattern error signal, and extracting a second monitoring pattern signal superimposed on the main signal to extract a pattern error. A second monitoring pattern error detection circuit for detecting the first pattern error signal and outputting the second pattern error signal, and outputting a logical product signal by inputting the first pattern error signal and the second pattern error signal A protection circuit that protects the AND signal and outputs an error detection signal to the outside; a first circuit that receives the first pattern error signal, detects a pattern abnormality, and outputs a first failure detection signal And the second pattern error signal is input to detect a pattern abnormality and
A second failure detection circuit that outputs the first failure detection signal, a second OR circuit that inputs the first failure detection signal and the second failure detection signal and outputs a logical sum signal, And a prohibition circuit for prohibiting the output of the logical sum signal and outputting a fault alarm signal to the outside.

[0005]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of this embodiment. In the monitoring pattern transmission device 1, the two monitoring pattern generation circuits 5 and 6 generate monitoring pattern signals having different patterns. The two monitoring pattern signals are alternately selected by the selection circuit 4, inserted into empty bits in the frame configuration by the multiplexing circuit 3 for each frame, and superimposed on the main signal. This signal is transmitted to the partner station via the monitored device 16 and the transmission line 2.

In the monitoring pattern receiving device 7, two monitoring pattern error detecting circuits 8 and 9
Extracts corresponding monitoring pattern signals, and detects this pattern error. These two detection outputs are converted to an AND signal by a logical product (AND) circuit 10 to provide a protection circuit 1
Enter 1. The protection circuit 11 outputs when an error signal having a number equal to or greater than the predetermined number of protection stages is input. This output signal is output to the outside as an error detection signal.

[0007] When an error occurs in the monitored device 16 and the transmission line 2, the detection outputs of the two error detection circuits 8 and 9 occur almost simultaneously, so that an AND signal is output. In addition, when an error occurs due to a failure in any of the monitoring pattern generation circuits 5 and 6 or the monitoring pattern error detection circuits 8 and 9, either one of the detection outputs is output, and no AND signal is output. That is, by arranging the monitoring systems in parallel, erroneous detection is prevented and detection accuracy is improved.

The two fault detection circuits 12 and 13 receive the detection outputs of the two monitoring pattern error detection circuits 8 and 9, respectively, and detect a fault from the abnormal state of the detection outputs. For example, as a phenomenon that occurs at the time of a failure, a state in which an error signal continues for a long time or no detection of an error signal continues for a long time is detected to determine a failure. Since the occurrence of a fault may occur on one side or both sides, the detection output becomes an OR signal in a logical sum (OR) circuit 14. When an error detection signal is generated, its output is inhibited and then sent to the outside as a fault alarm signal.

[0009]

As described above, the in-device monitoring system of the present invention has a function of preventing error detection due to self-generation of the monitoring device and of generating an alarm at the time of a failure, thereby improving the accuracy of detection output and improving reliability. This has the effect of improving the performance.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of the present embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 monitoring pattern generator 2 transmission line 3 multiplexing circuit 4 selection circuit 5, 6 monitoring pattern generation circuit 7 monitoring pattern receiving circuit 8, 9 monitoring pattern error detection circuit 10 AND circuit 11 protection circuit 12, 13 fault detection circuit 14 OR circuit 15 Prohibited circuit 16 Monitored device

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04J 3/00-3/26 H04L 12/24-12/26 H04L 29/00-29/14

Claims (1)

(57) [Claims] 1. A monitoring pattern transmitting apparatus for generating a monitoring pattern signal and transmitting the pattern signal to a transmission path via a monitored apparatus, and receiving the monitoring pattern signal from the transmission path via the monitored apparatus and receiving a pattern. In an in-device monitoring system including a monitoring pattern receiving device that detects an error, the monitoring pattern transmitting device generates a first monitoring pattern generation circuit that generates a first monitoring pattern signal, and generates a second monitoring pattern signal. A second monitoring pattern generation circuit,
A selection circuit that alternately selects and outputs the first monitoring pattern signal and the second monitoring pattern signal, and a multiplexing circuit that superimposes an output signal of the selection circuit on a main signal of the monitored device. A first monitoring pattern error detection circuit that extracts a first monitoring pattern signal superimposed on the main signal, detects a pattern error, and outputs a first pattern error signal; A second monitoring pattern error detection circuit for extracting a second monitoring pattern signal superimposed on the main signal, detecting a pattern error, and outputting a second pattern error signal; An AND circuit that inputs the second pattern error signal and outputs an AND signal; a protection circuit that protects the AND signal and outputs an error detection signal to the outside; A first failure detection circuit for inputting a second signal and detecting a pattern abnormality and outputting a first failure detection signal; and a second failure detection signal for receiving the second pattern error signal and detecting a pattern abnormality and outputting a second failure detection signal. A second failure detection circuit, an OR circuit that inputs the first failure detection signal and the second failure detection signal and outputs a logical sum signal, and a logical sum signal based on the error detection signal. A monitoring circuit for prohibiting output and outputting a fault alarm signal to the outside.