JPH06224876A - Communication path monitoring circuit - Google Patents

Abstract

PURPOSE:To provide the communication path monitoring circuit for respectively recognizing which path of receivers provided with first-Nth transmitters is abnormal. CONSTITUTION:Specified pattern data FTS1-FTSN are inserted to first - Nth data Di1-DiN, which are generated by generating means 34 of first - Nth transmitters 311-31N, by inserting means 35 and transmitted to a receiver 32, one of the specified pattern data FTS1-FTSN inserted to the respective first - Nth data Di1-DiN are passed, the other data are masked corresponding to a select signal SS by a mask means 36, the passed data (such as the FTS 1, for example) are selected corresponding to the signal SS, these selected data FTS 1 are fetched into a check means 38 corresponding to the signal SS so as to check whether those data are normal or abnormal and when they are abnormal, a first alarm signal A1 corresponding to a first path 331 shown by the select signal SS in a present state is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication path monitoring circuit. In a transmission / reception device connected by a number of routes, an IC that constitutes the device by monitoring the reception device
When communication cannot be performed due to a failure of electronic parts such as the above and a line, it can be recognized by an alarm or the like so as to be recognized.

Each route is monitored by FTS (Filling time slot: route monitoring area) in transmission data in each transmitting device.
The same path (route) monitoring pattern data is inserted in the line, and the receiving device checks the pattern data.

However, in this monitoring method, since the pattern data checked on the receiving side are all the same, it is not possible to limit which route the fault has occurred. Therefore, it is required to be able to accurately recognize which path has a failure.

[0004]

2. Description of the Related Art FIG. 5 shows a block diagram of a conventional communication path monitoring circuit, which will be described. In this figure, reference numeral 1 is an FTS check unit provided in the receiving device, and is configured to include a selector 2 and an FTS pattern check unit 3.

Reference numerals 4 ₁ to 4 _N are FTS insert parts provided in the first to Nth transmitters, all of which have the same structure.
The FTS pattern generation unit 5 and the selector 6 are provided.

FTS of each FTS insert part 4 ₁ to 4 _N
The pattern generators 5 all output the same path monitoring pattern data FTS1. The selector 6 performs an operation of inserting the path monitoring pattern data FTS1 into the FTS in the first to Nth data Di1 to DiN sent from another circuit (not shown) of each transmitting device.

This is because the selector 6 normally selects the first to Nth data Di1 to DiN, and while the FTS portion in the first to Nth data Di1 to DiN is supplied, the path monitoring pattern data FTS1. By selecting.

In this way, the path monitoring pattern data FTS
6 shows the first to Nth data Di1 to DiN in which 1 is inserted.
Shown in. However, the path monitoring pattern data FTS1 inserted in the FTS is, for example, 8-bit and 01 alternating data “01010101”.

The selector 2 shown in FIG. 5 has _first to Nth data Di output from the FTS insert sections 4 ₁ to 4 _N.
1 to DiN are sequentially selected according to the path selection signal S, and output as transmission data Do to a circuit (not shown) in the subsequent stage. The transmission data Do is shown in FIG.

The FTS pattern check unit 3 is for checking whether the path monitoring pattern data FTS1 inserted in the FTS in the transmission data Do is normal or not, and for outputting an FTS alarm signal A in the case of abnormality. .

In such a configuration, the path monitoring pattern data FTS1 is added to the FTS on the same time axis of the first to Nth data Di1 to DiN in each of the FTS insert parts 4 ₁ to 4 _N as shown in FIG. It is inserted and sent to the FTS check unit 1.

In the FTS check unit 1, first, when a path selection signal S for selecting the first data Di1 is supplied to the selector 2, the first data D is selected by the selector 2.
i1 is selected, and this is the transmission data D as shown in FIG.
It is output as o.

The transmission data Do is output to the circuit in the subsequent stage and also to the FTS pattern check unit 3. Then, the checking unit 3 checks whether the path monitoring pattern data FTS1 in the data Do is normal.

After that, in the selector 2, every time the path selection signal S is supplied, the second data Di2 (not shown) to the Nth data DiN are sequentially selected one by one and output as the transmission data Do, The FTS pattern check unit 3 checks the path monitoring pattern data FTS1.

Further, the N-th data DiN by the selector 2
When the selection is finished, the first data Di1 is selected again in the same manner as described above, and the check is performed. With the above operation, it is possible to determine whether or not each path to the receiving device including the first to Nth transmitting devices is normal.

[0016]

By the way, the above-mentioned F
In the route check by the TS check unit 1,
~ Since the path monitoring pattern data FTS1 of the first to Nth data Di1 to DiN sent from the FTS insert units 4 ₁ to 4 _{N of} the Nth transmission device are cyclically selected by the selector 2 and checked, There is a problem that it is not possible to determine which route is selected, and even if the FTS alarm signal A is output, it is not possible to determine which route is abnormal.

The present invention has been made in view of the above circumstances, and it is possible to individually recognize which path to the receiving device including the first to Nth transmitting devices is abnormal. It is intended to provide a route monitoring circuit.

[0018]

FIG. 1 shows a principle diagram of a communication path monitoring circuit according to the present invention. Communication path monitoring circuit shown in this figure, received by inserting specific pattern data FTS1~FTSN to each of the first through N data Di1~DiN the first to N transmission device 31 ₁ to 31 _N produces 32 To the receiving device 32 and transmits the first to Nth data Di1 to DiN.
Pattern data FTS1 to FT inserted in each of the
By checking the SN, the first to Nth transmitters 3
The first to N-th paths 33 _{1 to} 33 _N to the receiving device 32 including 1 _{1 to} 31 _N are monitored for normal / abnormal states, and the first to N-th transmitting devices 31 _{1 to} 31 _N are to be monitored. The generating means 34 for generating the specific pattern data FTS1 to FTSN and the inserting means 35 for inserting the specific pattern data FTS1 to FTSN in the specific areas of the first to Nth data Di1 to DiN and transmitting them to the receiving device 32 are provided. , Receiver 3
2, specific pattern data sent from the _first to Nth transmission devices 31 _{1 to} 31 _N in response to the selection signal SS that cyclically selects the _first to Nth paths 31 _{1 to} 31 _N one by one. F
First to Nth data Di1 with TS1 to FTSN inserted
To DiN, and masking means 36 for masking the other, selecting means 37 for selecting data output from the masking means 36 according to the selection signal SS, and data output from the selecting means 37. Specific pattern data F in
The TS1 to FTSN are fetched in accordance with the selection signal SS, and the normality / abnormality of the specific pattern data FTS1 to FTSN is checked, and in the case of abnormality, the first to Nth signals indicated by the selection signal SS
Which is configured by providing a check means 38 for outputting the first through N-th alarm signal A1~AN corresponding to the path 33 ₁ ~ 33 _N.

[0019]

According to the present invention described above, in each of the _first to Nth transmitters 31 _{1 to} 31 _N , the specific pattern data FTS1 to FTSN output from the generating means 34 is inserted into the first to Nth transmitting means by the inserting means 35. It is inserted into a specific area of the data Di1 to DiN.

Then, the specific pattern data FTS1 to FTS
The first to Nth data Di1 to DiN in which the TSN is inserted are transmitted to the receiving device 32. In the receiving device 32,
Any of the first to Nth data Di1 depending on the selection means SS
~ DiN is selected. Here, in the state where the selection signal SS selects the first path 33 ₁ , the first to Nth data Di1
In the case where the specific area of ~ DiN is provided at the timing of being supplied to the mask means 36, the specific pattern data FTS in the first data Di1 as shown in FIG.
1 passes through the mask means 36, and the other data Di2
~ DiN is masked.

First data Di passed through the mask means 36
The specific pattern data FTS1 in 1 is selected by the selection means 37 to which the selection signal SS in the previous state is supplied, and is output as the transmission data Do.

Then, the selection signal SS is taken into the checking means 38 to which it is supplied, and it is judged whether it is normal or not. If the determination result is abnormal, the check means 38 outputs the first alarm signal A1 corresponding to the first path 33 ₁ indicated by the selection signal SS in the current state.

From this, it can be recognized that the first path 33 ₁ including the first transmitter 31 ₁ to the receiver 32 is abnormal.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram of a communication path monitoring circuit according to an embodiment of the present invention. In this figure
The same reference numerals are given to the portions corresponding to the respective portions of the conventional example shown in FIG.

In FIG. 3, 4 ₁ to 4 ₄ are first to fourth
First to fourth FTS insert parts provided in the transmission device, all of which have the same configuration, and FTS pattern generation parts 5 ₁ to
5 ₄ and selectors 6 _{1 to} 6 ₄ .

Each of the FTS pattern generators 5 _{1 to} 5 ₄ has the same format as the path monitoring pattern data FTS.
1 to FTS4 are output. Selector 6 _{1 to} 6
₄ is an FT in the first to fourth data Di1 to Di4 sent from another circuit (not shown) of the first to fourth transmitting devices.
The operation is to insert the path monitoring pattern data FTS1 to FTS4 into S (Filling time slot).

The insertion operation is performed by any of the selectors 6 _{1 to} 6 _4.
It is supposed to be done at the same time. This is because each of the selectors 6 _{1 to} 6 ₄ normally selects the _first to fourth data Di1 to Di4, and while the FTS portion in the first data Di1 is supplied, the path monitoring pattern data FTS1 to FTS.
This is done by selecting 4.

However, the path monitoring pattern data FTS1 to FTS4 inserted in the FTS are, for example, 8-bit and 01 alternating data "01010101". Reference numeral 11 denotes an FTS check unit provided in the receiving device, which includes a mask circuit 12, a selection circuit 13, and an FTS pattern check unit 14.

The mask circuit 12 passes any one of the path monitoring pattern data FTS1 to FTS4 in the data Di1 'to Di4' output from each FTS insert section 4 ₁ to 4 ₄ and blocks the other. It is a thing.

The passage / cutoff is determined by the monitoring area recognition signal S.
R, first and second route selection signals S1 and S2, and four 4-input end AND circuits 2 are provided.
It is composed of 1, 22, 23 and 24.

The AND circuit 21 supplies the first and second path selection signals S1 and S2, the AND circuit 22 supplies the first path selection signal S1, and the AND circuit 23 supplies the second path selection signal S2. , Both are data inversion ends.

The monitoring area recognition signal SR is normally at "L" level as shown in FIG. 4, but each data Di1 'to D1.
Path monitoring pattern data FTS1 to FTS4 in i4 '
Is set to the “H” level at the timing of being supplied to the AND circuits 21 to 24.

The first and second route selection signals S1 and S2 are
As shown in FIG. 4, when the monitoring area recognition signal SR becomes "H" level, it becomes "L" level or "H" level.

Specifically, the monitoring area recognition signal SR is at "H" level, and the first and second route selection signals S1,
When both S2 are at "L" level, only the path monitoring pattern data FTS1 of the data Di1 'passes through the AND circuit 21.

When the signal S1 is at the "L" level, the signal S2 is
Is at "H" level, the path monitoring pattern data FTS
2 passes through the mask circuit 12 via the AND circuit 22, and when the signal S1 is at the “H” level and the signal S2 is at the “L” level, only the path monitoring pattern data FTS3 is transmitted via the AND circuit 23 to the mask circuit. 12 through the signal S1,
When both S2 are at "H" level, only the path monitoring pattern data FTS4 passes through the mask circuit 12 via the AND circuit 24.

The selection circuit 13 selects one of the path monitoring pattern data FTS1 to FTS4 that has passed through the mask circuit 12 in accordance with the first and second path selection signals S1 and S2. Input terminal AND circuit 25,
26, 27, 28 and a 4-input terminal OR circuit 29.

The supply terminals of the AND circuit 25 for the first and second path selection signals S1 and S2, the supply terminal of the AND circuit 26 for the first path selection signal S1, and the supply terminal of the AND circuit 27 for the second path selection signal S2 are , Both are data inversion ends.

When the first and second path selection signals S1 and S2 are both at the "L" level at the timing of being supplied to the mask circuit 12 described above, the mask circuit 12 of the mask circuit 12 having the above-described configuration is operated. The path monitoring pattern data FTS1 output from the AND circuit 21 passes through the AND circuit 25 and also passes through the OR circuit 29 and is output. That is, the path monitoring pattern data FTS1 is selected and output as a part of the transmission data Do.

When the signal S1 is at the "L" level, the signal S2 is
Is at the “H” level, the path monitoring pattern data FTS2 output from the AND circuit 22 is output via the AND circuit 26 and the OR circuit 29 as a part of the transmission data Do.

When the signal S1 is at the "H" level and the signal S2 is at the "L" level, the path monitoring pattern data FTS3 output from the AND circuit 23 is transmitted via the AND circuit 27 and the OR circuit 29 as one of the transmission data Do. It is output as a copy. The path monitoring pattern data F output from the AND circuit 24 when both the signals S1 and S2 are at “H” level
TS4 is output as a part of the transmission data Do via the AND circuit 28 and the OR circuit 29.

The FTS pattern check unit 14 checks whether or not the path monitoring pattern data FTS1 to FTS4 output as a part of the transmission data Do is normal and, if abnormal, outputs the first to fourth FTS alarm signals A1 to A4. It is what is output.

The check is performed according to the first and second route selection signals S1 and S2.
When both S2 are at "L" level, the path monitoring pattern data FTS1 is checked for normality / abnormality, and when abnormal, the first FTS alarm signal A1 is output.

When the signal S1 is at the "L" level, the signal S2 is
Is at "H" level, the path monitoring pattern data FTS
2 is checked, the second FTS alarm signal A2 is output in the case of an abnormality, and the signal S1 is at the “H” level and the signal S
When 2 is "L" level, path monitoring pattern data FTS
3 is checked, the third FTS alarm signal A3 is output in the case of abnormality, and the path monitoring pattern data FTS4 is checked when both of the signals S1 and S2 are at the “H” level. The 4FTS alarm signal A4 is output.

[0044] In such a configuration, first, in the first to 4FTS insert portion ₄₁ to _4, the path monitoring pattern data FTS1~FTS4 the FTS on the same time axis of the first through fourth data Di1~Di4 It is inserted and sent to the FTS check unit 11.

In the FTS check unit 11, as shown in FIG. 4, the monitoring area recognition signal SR is the data Di1 'to Di output from the FTS insert units 4 ₁ to 4 _4.
While the path monitoring pattern data FTS1 to FTS4 in 4'are supplied, the level becomes "H" level. At this "H" level, the first and second route selection signals S1 and S2 are "L".
The four states of level and "L" level, "L" level and "H" level, "H" level and "L" level, "H" level and "H" level are cycled.

That is, when the data Di1 'to Di4' are sent from the FTS insert sections 4 ₁ to ₄ 4 respectively, the "H" level of the monitoring area recognition signal SR in the first state, the first state
And the path monitoring pattern data F of the data Di1 'depending on the "L" level of both the second path selection signals S1 and S2.
TS1 passes through the AND circuit 21 of the mask circuit 12, further passes through the AND circuit 25 and the OR circuit 29 of the selection circuit 13, and is output as a part of the transmission data Do to a subsequent circuit (not shown) and the FTS pattern check is performed. It is input to the section 14.

Other path monitoring pattern data FTS2 to FTS
The TS4 will be shut off by the AND circuits 22-24. The path monitoring pattern data FTS1 input to the FTS pattern check unit 14 is checked here,
If the check result is abnormal, the first FTS alarm signal A1 is output.

Next, when the signals SR and S2 become the "L" level and the "H" level when the signal SR becomes the "H" level, the path monitoring pattern data FTS of the data Di2 '.
2 passes through the AND circuit 22, further passes through the AND circuit 26 and the OR circuit 29, and is output as a part of the transmission data Do. Then, it is checked by the FTS pattern check unit 14, and if the check result is abnormal, the second F
The TS alarm signal A2 is output.

Next, when the signals S1 and S2 become "H" level and "L" level when the signal SR becomes "H" level, the path monitoring pattern data FTS of the data Di3 '.
3 passes through the AND circuit 23, further passes through the AND circuit 27 and the OR circuit 29, and is output as a part of the transmission data Do. Then, it is checked by the FTS pattern check unit 14, and if the check result is abnormal, the third F
The TS alarm signal A3 is output.

Next, when both the signals S1 and S2 become the "H" level when the signal SR becomes the "H" level, the path monitoring pattern data FTS4 of the data Di4 'passes through the AND circuit 24, Further, it passes through the AND circuit 28 and the OR circuit 29 and is output as a part of the transmission data Do. Then, it is checked by the FTS pattern check unit 14, and if the check result is abnormal, the fourth FTS alarm signal A4 is output.

Thereafter, this operation is repeated, and it is possible to judge for each route whether each route to the receiving device including the first to fourth transmitting devices is normal. Therefore, by checking the level states of the first and second route selection signals S1 and S2, it is possible to determine which transmitting device and route are currently selected, and which FTS alarm is detected when an abnormality occurs. Which of the paths is abnormal can be determined from the output of the signals A1 to A4.

[0052]

As described above, according to the present invention,
There is an effect that it is possible to individually recognize which path to the receiving device including the first to Nth transmitting devices is abnormal.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a timing chart for explaining the operation of FIG.

FIG. 3 is a block configuration diagram of a communication path monitoring circuit according to an embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of FIG.

FIG. 5 is a block diagram of a conventional communication path monitoring circuit.

6 is a timing chart for explaining the operation of FIG.

[Explanation of symbols]

31 _{1 to} 31 _N 1st to Nth transmitting device 32 Receiving device 33 _{1 to} 33 _N 1st to Nth route 34 Generating means for generating specific pattern data 35 Inserting means for inserting specific pattern data in a specific area of data 36 Masking means for passing only one data 37 Selection means for selecting one data 38 Checking means for judging normality / abnormality of specific pattern data

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04L 12/26 29/14

Claims (1)

[Claims] 1. A first to N-th transmitting device (31₁~ 31_N) Is generated
Specific pattern for each of the 1st to Nth data (Di1 to DiN)
Data (FTS1 to FTSN) and send it to the receiver (32)
Then, the first to Nth data (Di1 to DiN) are received by the receiving device (32).
Pattern data (FTS1 to FTSN) inserted in each of
By checking the first to Nth transmitters (31₁
~ 31_N) To the receiving device (32) including the first to Nth routes (3
3₁~ 33 _N) Communication path monitoring times to monitor the normal / abnormal status of
In the road, the first to Nth transmitters (31₁~ 31_N), Generating means for generating the specific pattern data (FT1 to FTN)
(34) and in the specific area of the first to Nth data (Di1 to DiN)
The receiving device (32) by inserting pattern data (FT1 ~ FTN)
And an insertion means (35) for transmitting to the receiving device (32).₁~ 33_N) Are selected one by one
According to the selection signal (SS) to be selected, the first to Nth transmitters (3
1₁~ 31_N) The specific pattern data (FTS
1 to FTSN) inserted first to Nth data (Di1 to DiN)
One of the mask means (3
6) and the data output from the mask means (36) to the selection signal (S
S), selecting means (37) for selecting the specific pattern in the data output from the selecting means (37)
Data (FTS1 to FTSN) according to the selection signal (SS).
Including normal / different of the specific pattern data (FTS1 to FTSN)
Always check, in case of abnormality, the selection signal (SS) indicates
1st to Nth route (33₁~ 33_N) Corresponding to the first to Nth
Check means (38) that outputs the frame signals (A1 to AN).
A communication path monitoring circuit characterized in that