JPS60100852U

JPS60100852U - Memory failure detection circuit

Info

Publication number: JPS60100852U
Application number: JP18930583U
Authority: JP
Inventors: 西坂　実
Original assignee: 株式会社日立製作所
Priority date: 1983-12-09
Filing date: 1983-12-09
Publication date: 1985-07-09

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

番１図は本考案の実施例の実エラーアドレスを求める論
理構成図、第２図はタイムチャート図、第３図はアドレ
ス変換論理構成図、第４図は論理動作流れ図である。１０・論理アドレスレジスタ、３…実アドレスレジスタ
、４・・・メモリアドレスラッチレジスタ、５・・・メ
モリ、６・・・実エラーアドレスレジスタ、Ｓ１〜Ｓ６
・・・各制御線、３・・・ディレクトリ・レジスタ、４
・・・検査回路、５・・・実エラーアドレス・レジスタ
、６・・・加算回路、７・・・ページ枠インデックス、
８・・・アクセス制御ビット。才１１図1 is a logical configuration diagram for determining an actual error address in an embodiment of the present invention, FIG. 2 is a time chart diagram, FIG. 3 is an address conversion logic configuration diagram, and FIG. 4 is a logical operation flowchart. 10. Logical address register, 3... Real address register, 4... Memory address latch register, 5... Memory, 6... Actual error address register, S1 to S6
...Each control line, 3...Directory register, 4
...Inspection circuit, 5...Actual error address register, 6...Addition circuit, 7...Page frame index,
8...Access control bit. 1 1 figure

Claims

[Scope of utility model registration request]

In a virtual machine with a label addressing function,
When a memory error is detected, the page directory is read out while updating the actual error address register where the error actual address is stored and the page frame address.The reading device checks the read page directory and reads the corresponding page. When the frames are not separated, a check circuit checks whether the page frame index part in the directory is equal to the page address part of the actual error address, and adds the displacement field of the page frame address and the actual error address to determine the logical error address. When a memory failure is detected, the check circuit performs pruning until it finds that the corresponding page frame is not in a separated state and that the page frame index part and the page address part of the actual error address are equal. The page directory is read out continuously by the reading device, and when they become equal, the address adder adds the page frame address and the displacement field of the actual error address register,
A memory failure detection circuit characterized by having a function of converting an actual error address into a logical error address.