JPS5995799U

JPS5995799U - Motor control circuit

Info

Publication number: JPS5995799U
Application number: JP1982192613U
Authority: JP
Inventors: 深田　和男
Original assignee: 山水電気株式会社
Priority date: 1982-12-20
Filing date: 1982-12-20
Publication date: 1984-06-29

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来回路の一例の構成を示すブロック図、＄２
図は同側にお７ける位相比較器の動作波形図、第３図は
本考案の一実施例における全体回路構成を示すブロック
図、第４図および第５、図は。同実施例の要部回路を詳
細に示すブロック図、第６図は同実施例におけるＰＷＭ
変調器の動作を説明するためのタイミングチャート、第
７図〜第９図は同実施例における位相比較器の動作を詳
細に説明するためのタイミングチャート、第１０図は同
実施例の全体動作を説明するためのタイミングチャート
である。１・・・直流モータ、２・・・パルスエンコーダ、５・
・・水晶発振器、６，１３・・・分周器、１１・・・電
力増幅器、１２・・・ＰＷＭ変調器、１４・・・位相比
較器、１５・・・スイッチング回路、１６・・・タイミ
ング発生回路、１７・・・立上り微分パルス発生回路、
１８・・・立下り微分パルス発生回路、１９・・・アン
ドゲート、２０・・・カウンタ、２１・・・コード検出
回路、２２・・・立上り微分回路、２３・・・立下り微
分回路、２４・・・ＲＳフリツブフロツプFigure 1 is a block diagram showing the configuration of an example of a conventional circuit, $2
FIG. 3 is a block diagram showing the overall circuit configuration in an embodiment of the present invention, and FIGS. A block diagram showing the main circuit of the same embodiment in detail, FIG. 6 is a PWM in the same embodiment.
A timing chart for explaining the operation of the modulator, FIGS. 7 to 9 are timing charts for explaining in detail the operation of the phase comparator in the same embodiment, and FIG. 10 is a timing chart for explaining the overall operation of the same embodiment. It is a timing chart for explanation. 1... DC motor, 2... Pulse encoder, 5...
...Crystal oscillator, 6, 13... Frequency divider, 11... Power amplifier, 12... PWM modulator, 14... Phase comparator, 15... Switching circuit, 16... Timing Generation circuit, 17... rising differential pulse generation circuit,
18... Falling differential pulse generation circuit, 19... AND gate, 20... Counter, 21... Code detection circuit, 22... Rising differential circuit, 23... Falling differential circuit, 24 ...RS fritsub flop

Claims

[Scope of utility model registration request]

A frequency divider that divides the output of a pulse encoder for detecting the rotational speed of the motor to be controlled into a frequency of l/N (N is a positive integer), and a frequency divider that receives the output of this frequency divider and calculates the order of the reference frequency signal. a phase comparator that outputs a pulse train with a pulse width corresponding to the phase difference; and a phase comparator that receives the output of the pulse encoder and outputs a pulse train that has a pulse width that corresponds to the pulse frequency and has the same repetition period as the output pulse train of the phase comparator. and a switching circuit that alternately selects and derives the output pulse of the pulse width modulator and the phase comparison output pulse to obtain a pulse width modulated wave to be supplied to the motor to be controlled. motor control circuit.