JPS599553U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS599553U JPS599553U JP10423182U JP10423182U JPS599553U JP S599553 U JPS599553 U JP S599553U JP 10423182 U JP10423182 U JP 10423182U JP 10423182 U JP10423182 U JP 10423182U JP S599553 U JPS599553 U JP S599553U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor equipment
- heat sink
- metal plate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の半導体装置を示す斜視図、第2図はその
断面図である。第3図は本考案の一実施例を示す斜視図
、第4図はその断面図である。第5図は他の実施例の断
面図である。
1・・・・・・放熱板、2・・・・・・半導体素子、3
・・・・・・外部導出端子、4・・・・・・樹脂、5・
・・・・・金属板。FIG. 1 is a perspective view showing a conventional semiconductor device, and FIG. 2 is a sectional view thereof. FIG. 3 is a perspective view showing an embodiment of the present invention, and FIG. 4 is a sectional view thereof. FIG. 5 is a sectional view of another embodiment. 1... Heat sink, 2... Semiconductor element, 3
...External lead-out terminal, 4...Resin, 5.
...Metal plate.
Claims (1)
脂封止型半導体装置において、樹脂を介して放熱板と相
対した場所に電気的に絶縁された金属板があり、これら
が同時に樹脂封止されていることを特徴とする半導体装
置。In a resin-sealed semiconductor device in which a metal plate on which a semiconductor element is mounted is exposed as a heat sink, there is an electrically insulated metal plate opposite the heat sink through the resin, and these are simultaneously resin-sealed. A semiconductor device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10423182U JPS599553U (en) | 1982-07-09 | 1982-07-09 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10423182U JPS599553U (en) | 1982-07-09 | 1982-07-09 | semiconductor equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS599553U true JPS599553U (en) | 1984-01-21 |
Family
ID=30244827
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10423182U Pending JPS599553U (en) | 1982-07-09 | 1982-07-09 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS599553U (en) |
-
1982
- 1982-07-09 JP JP10423182U patent/JPS599553U/en active Pending
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