JPS5991542A - Tracing device of microprogram - Google Patents

Abstract

PURPOSE:To trace the execution of a microprogram in accordance with a program list by adjusting the shift of generation of timing between an address signal and a control signal of each part. CONSTITUTION:In a clock period when a microinstruction A read out from an address A of a microprogram memory 2 is held in a pipe-line register 3 and a control signal SCS with contents (a) indicating the succeeding address is outputted from the register 3, the address signal ADR of the succeeding address 1,001 in the microprogram memory 2 is outputted from a sequence controller 1. The contents 1,001 of the ADR outputted from the sequence controller 1 is latched by a register 6 connected to the prestage of a tracer 4 at the timing holding the contents B of control of each part in the pipe-line register 3. Consequently, the ADR of 1,001 latched by the register 6 through the tracer 4 can be read at the same timing as the CS held in the pipe-line register 3 and respective contents can be displayed.

Description

[Detailed Description of the Invention] Technical Field Original stH 0 Related to a microprogram tracing device for determining the pros and cons of programming 0 Prior Art In general, most of the debugging work for programming involves tracing the execution of the program and analyzing the results. This is done by determining the

Conventionally, the operation of the controller was determined by 71 instructions in the memory storing the microprogram. In the control stem, the first
As shown in the figure, the address signal ADH is sent from the sequence controller 1 to the microprogram memory 2.
and each part control signal C8 outputted from the pipeline register 3 provided on the output side of the memory 2 is transmitted to the tracer 4.
The execution result is stored and displayed on the display 5, so that an error check of the jiggling programming can be performed.

In that case, especially on the microprogram control system side, the pipeline register 3 holds the sequence control signal SO8 for determining the next memory address together with the $1i number C8 on each part side currently being executed, thereby Since the so-called pipeline system is designed to perform advance control, the address signal ADH sent from the sequence controller 1 to the microprogram memory 2 is given to the pipeline register (positive edge six-tricker type register) 3. The second half of one clock period in the clock CLK indicates the memory address according to the next execution instruction.

Therefore, in a pipelined microprogram control system, when tracing the microprogram, the contents of the address signal ADH taken into the tracer 4 and the control signal C8 of each part may differ in time. 7, causing inconvenience in programming debugging work.

Purpose The present invention has been made in consideration of the above points, and when using the pipeline control method, the address signal @ADR
This invention provides a microprogram tracing device that can trace the execution of a microprogram according to a program list by adjusting the generation timing difference between the control signal C8 and each part control signal C8.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

In the microprogram tracing device according to the present invention, as shown in FIG.
1 microprogram-) Execution of a microprogram in a pipelined ct'l microprogram control system consisting of a memory 2 and a pipeline register 3 is traced by a tracer 4. In particular, the clock CLK of the pipeline register 3 is given; A register 6 is provided to latch the address signal ADR output from the sequence controller 1 to the 71 program memory 2 in response to the 7 clock CLI, and the latched contents of the register 6 and each part control signal C8 output from the pipeline register 3 are provided. and is read into tracer 4.

In the system configured as described above, the following describes the operation when the list of microprograms to be focused on at the time of lag is as follows.

Microprogram Each part control year Address of sequence control/memory 2 Contents of No. C8 Contents of signal SC8 1000 A al
ool E b Now, the microinstruction A read from address 1000 of the microprogram memory 2 is held in the pipeline register 3, and the sequence control signal SO8 with content a instructs the next address from the pipeline register 3.
If this is the clock period during which the address signal ADH of the next address 1001 in the microprogram memory 2 is output from the sequence controller 1.

Therefore, the content 1001 of the address signal ADR output from the sequence controller 1 is transmitted to the previous stage of the tracer 4 at the timing when the content B of each part control is held in the pipeline register 3 at the beginning of the next clock period. latched in register 6.Thereby, in tracer 4, the address equivalent 10 latched in that register 6
The address signal ADH of 01 and the control signal C8 of each part of the control content B held in the pipeline register 3 can be read at the same timing to display each content on the display 5, and the execution result of the microprogram can be displayed in the program. It is possible to check the list.

As described above, in the microprogram tracing device according to the present invention, when the microprogram control system adopts the pipeline control method, an address signal latch register to which the same clock as the pipeline register is applied is used. Adjusts the timing difference between the address signal of the microprogram memory and the control signal issued from the bipolar register,
This allows you to check the execution results of microprograms in the tracer through the program list, eliminating the need to edit the execution results of microprograms and then perform debugging as in the past. This has the great advantage of improving the speed and accuracy of debugging.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional microprogram tracing device, and FIG. 2 is a block diagram showing a microprogram tracing device according to an embodiment of the present invention. ■...Sequence controller, 2...Microprogram memory, 3...-pipeline register, 4
...Tracer, 5...Display device, 6...Register. Applicant's agent Kiyoshi Torii

Claims (1)

[Claims] In a system that uses a tracer to check the execution results of microprograms in a pipelined microprogram control system, the same clock as the pipeline register on the system side is given.
A register is provided in the pipeline register to latch an address signal given to the microprogram memory at the same timing when a microinstruction read from the microprogram memory is held, and the contents of the register are given to the tracer. A microprogram tracing device featuring: