JPS5986262A - Gate turn-off thyristor - Google Patents

Abstract

PURPOSE:To increase the turn-OFF enabling current by dividing the current concentration in an emitter by dividing the emitter region of a gate side, thereby dispersing the current concentration at the gate turn-OFF time. CONSTITUTION:An n type emitter nE is divided into two parts 4x, 4y, an insulating film 10 is formed on a p type isolating region 9 therebetween, and a cathode 5a couples nE region parts 4x, 4y across the film 10. Since carrier is not injected in the region 9, the current concentration is completely isolated into two boundary region parts of the p type isolating regions 9 of two nE region parts 4x, 4y. In this manner, even if the width of the region 9 is of the degree of diffusing length of the carrier, the width of the current concentration region is increased into approx. 3L, thereby alleviating the current concentration.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to gate turn-off current risk, and in particular to improvements in increasing the maximum turn-off current.

[Prior art]

Gate Turn Off Sailisk (hereinafter referred to as “GTOJ”).

) can turn off the main current by reverse biasing the gate, so it is not safe to use a commutation circuit as in a conventional normal thyristor.

Therefore, when used in an inverter or chopper device, there is a great advantage that the device can be made smaller and lighter.

Figure 1 is a cross-sectional view showing the structure of a conventional high-power GTO, in which (1) is the n-type base (n, ) region, (2) and (3).
) are a p-type base (PR) region and a p-type emitter (p8) region formed by diffusing P-type impurities from the nB region bidirectional side, respectively, (4) is a p-type region, and region (2) is an n-type impurity region. n-type emitters (nI regions, (5), (6), and (7) are each formed by selectively diffusing n8
region (4), p, region (2).

A negative electrode, a gate electrode, and a positive electrode formed in ohmic contact with the p8 region (3) are shown.

To turn on this conducting GTO, apply a negative voltage to the gate electrode (6) with respect to the negative electrode (5);
This is done by extracting the carriers filled in the pB region 2) and the nB region 1) from the gate electrode (6).

Looking at this turn-off in more detail, the conduction region of GTO is from the region near the gate electrode (6) to the iJI region (4
) into the center of lt D. That is, n0
There is a part where current is concentrated in the center of region (4), and when trying to turn off a large current, a temperature rise occurs locally in the element, failure to shut off, and destruction of the element.0 FIG. 2 shows a cross-sectional view of a prior art GTO as a single-force type for improving this turn-off characteristic. p2 in the part of the figure
A shorting n+ region (8) is provided. In this structure, the current concentration during turn-off is dispersed in the vicinity of the two regions indicated by A in FIG. 2, so that the local temperature rise has not been sufficiently alleviated in the past. Figure 3 shows this prior art GT
This is a partial cross-sectional view showing the final state of current concentration in O. Since carrier injection also occurs in the n8 region (4) opposite to the pI-shorted n+ type region (8), the dispersion effect of the concentrated region can be fully absorbed. In order to take out the short circuit n+ type region 8], it is necessary to have a sufficient width W.

If the carrier diffusion length is L, then the short circuit ♂ shadow area (8
) is required to be at least 2L, and to obtain a sufficient effect, 3L'-4L is required. For example, in a short circuit, sufficient distribution of current concentration cannot be expected.

[Overview of credit]

This invention aims to improve the above-mentioned points,
The emitter region on the gate side is also divided into two to divide the current concentration in the main emitter section, thereby providing a GTO with a large turn-off current.

[Embodiments of the invention]

FIG. 4 is a sectional view of an embodiment of the present invention, where n and area are 2.
It is divided into two parts (4K) and (4,7), between which a p-type isolation region (9) is seen on the cathode side surface of the base, on which an insulating film QO is formed, and the cathode (5a) is two n across this insulating film θ(). Area section & 4X)
.

(4y) are connected. Figure 5 shows one n. A plan view of one segment consisting of a region and a gate part around it,
The cross-hatched area is the insulating film 0I.
, below which a Fip-shaped separation region (9) exists.

In this embodiment, since carrier injection does not occur in the p-type isolation region (9), the current concentration I/'i is Completely separated into border area parts. FIG. 6 is a partial cross-sectional view showing the final current concentration situation at gate turn-off in this embodiment. As mentioned above, since there is no carrier injection in the p-type isolation region (9), for example, the p-type isolation region (9) 9
) is approximately the same as the diffusion length of the carriers, and as shown, the concentration area at one location becomes wider, which plays a role in alleviating current concentration.

Although the above explanation has been made regarding a p-gate turn-off thyristor, the present invention is similarly applicable to an n-gate turn-off thyristor.

〔Effect of the invention〕

As explained above, in the gate turn-off thyristor of the present invention, an isolation region is formed at the center of the gate-side emitter region, and a high impurity concentration is added to the other emitter region opposite to the center of the gate-side emitter region. Since the short-circuit region is formed, the current concentration at the time of gate turn-off is dispersed, and the current that can be turned off can be increased.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view showing the structure of a conventional high-power GTO.
FIG. 2 is a sectional view of a prior art GTO, FIG. 3 is a partial sectional view showing the final current concentration situation of this prior art GTO, and FIG. 4 is a sectional view showing an embodiment of the present invention. FIG. 5 is a plan view of one segment of this embodiment, and FIG. 6 is a partial sectional view showing the final current concentration situation at gate turn-off of this embodiment. In the figure, (1) is an n-type base region, (2) is a p-type pace region, (J) y (3a) is a p-type emitter region,
(4) is the n-type emitter region, (4x) + (4y)
is the n-type emitter region, (5), (5FL) is the cathode, (6) is the gate electrode, (7) is the VvIi quadrupole, (8
) is an n+ type region (9) is an isolation region, and Qo is an insulating film. In addition, the same reference numerals in the figures indicate the same or equivalent parts.O Agent: Makoto Kuzuno (1 other person) Figure 1 Figure 2 Figure 7

Claims (1)

[Claims] (1) A p-type emitter region and an n-type base region from one main surface to the other main surface of the semiconductor substrate. The p-type base region and the n-type emitter region are successively adjacent to each other to form a 4
In the gate turn-off thyristor in which a layered structure is formed, a first main surface portion on the p-type (-1 Fin type) emitter region side of the semiconductor substrate faces a central portion of the n-type (or p-type) emitter region. The part KFi above P type (
In addition, it lacks the emitter region of the Fin type (Fin type) and has a high impurity concentration n+ type (-
or ■) + shape) region is formed, and this ♂ shape (or p
The + type) region is connected to a positive (or negative) electrode formed on the first main surface and connected to the p-type (or n-type) emitter region, and the n-type (or p-type) A p-type (or n-type) isolation region connected to the p-type (t or n-type) base region is formed in the center of the emitter region, and straddles the insulating film formed on the surface of this isolation region. A gate turn-off builisk characterized in that a negative (!i-positive) electrode is formed to connect portions of the n-type (or p-type) emitter region on both sides of the isolation region.