JPS6380569A - Conductivity modulation lateral mos-fet - Google Patents

Abstract

PURPOSE:To shorten a turn-off time by providing a drain electrode to a drain region for connection to both one conductivity type base layer and a reverse conductivity type drain layer on the surface. CONSTITUTION:A drain electrode 3 is connected to both a P<+> type drain layer 7 and an N<+>-type buffer layer 11 to form an anode short-circuit structure on an element surface so that electron are removed without intermediary of the layer 7 in the drain region. When there is no layer 11, the electrode 3 is contacted with the layers 7 and an N<->-type base layer 4. Thus, an anode short- circuit structure is provided merely by altering the simple manufacturing procedure to shorten the turn-off time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a MOS-FET that utilizes bipolar operation by adding a region of a conductivity type opposite to that of the source on the drain side.

[Prior art and its problems]

For example, vertical N-channel M using bipolar operation
The OS-FET has a structure as shown in FIG.

Figure 3 shows a schematic cross-sectional view of the main parts.
The main components are source electrode 1, gate electrode 2. Drain electrode 3. N-base layer 4° 2 layers 5. P base WIb
*P drain layer 7. N sauce I sauce8. Gate polysilicon layer 9. It consists of an insulating oxide film 10, an N+F layer 1, and a Ga oxide film 12. The symbol S is a source, G is a gate, and D is a drain.

When a voltage higher than a certain threshold value is applied to the gate electrode 2 of the source t41 of an element having such a structure,
The surface of the P base rti6 under the gate polysilicon layer 9 is inverted to form an electron channel, and the source and drain are brought into conduction. When electrons flowing into the N-base layer 4 through this channel reach the P drain layer 7, they cause hole injection. 4 undergoes conductivity modulation to the N base by hole injection, and the conductivity becomes significantly thicker (becomes
It becomes possible to flow a large current. Although the N buffer layer 11 is not necessarily required for this operation, it is formed to improve the withstand voltage. The current obtained is P, normal vertical type power M without drain Jfl 7 attached.
(The fact that it is 10 to 20 times larger than JS-FET is a big advantage.

One of the problems with such conductivity-modulated MOS-FETs is that due to bipolar operation, electrons and holes are still subject to conductivity modulation in the N-base layer even after the channel is cut off. 4, and the current continues to flow until they disappear, resulting in a long turn-off time. In other words, how quickly the electrons and holes remaining in the N-base layer 4 can be annihilated depends on whether the turn-off time can be shortened, which is an important issue for this device. It has become.

As a countermeasure, for example, an element called a lifetime killer is intentionally introduced into the N-base layer 4, and by promoting the recombination of electrons and holes involved in conductivity modulation, these can be quickly (disappeared). However, this method degrades the lifetime of carriers in a conductive state, resulting in a high resistance of the N-base layer 4, which increases the on-voltage generated between the source and drain. The loss of power causes the inconvenience of becoming a dog.Therefore, it is undesirable to rely solely on the strength of reducing the carrier's lifetime.

From this point of view, the anode shorting method, which is used for example in Cy-11 stars, is known as a method for extracting the remaining electrons and holes.

Figure 4 shows a structural cross-sectional diagram when this anode short circuit is applied to the element shown in Figure 3.
The same reference numerals are used for parts common to those in the figure. In FIG. 4, the P drain layer 7 is partially buried in the N buffer layer 11 and the P drain layer 7, and the N buffer layer 11 and the P drain layer 7 are drained. I am shorting it with Ei3.

In this way, when the device is turned off, the electrons and holes that have been subjected to conductivity modulation in the N-base layer 4 pass through the drain electrode 3 and the source ":Jt pole 1, and the path is as shown in Fig. 3. In other words, at turn-off, in FIG. 3, the electrons pass through the P+ layer 7, which has a high potential barrier, to the drain, but in the anode short structure shown in FIG. Holes can escape from the drain side faster than in the case of FIG. The electrons and holes that occur quickly disappear, making it possible to shorten the turn-off time.

However, the vertical power MOS described above
It is actually extremely difficult to apply the anode short method to FETs. That is, Figures 3 and 4
The figure is a model diagram for convenience of explanation, and the dimensions are not disclosed, but in reality, the P region 7 is 350 to 500 μm.
Because of the thickness above, it is actually not easy to process the N/F layer 11 as shown in FIG.

On the other hand, a conductivity modulation type MOS-FET with a horizontal structure is also known, and a schematic cross-sectional view of its main parts is shown in Figure 5, but for convenience, the parts having the same functions as those in Figures 3 and 4 are shown. The same symbols were used for In FIG. 5, an N buffer layer 1] and a P drain layer 7 are formed on the same plane as the source region of the N base layer 4, and a drain electrode 3 is provided thereon to form a horizontal structure. Gate and drain are N
- Both of the base layers 4 are located on the same side. The P layer below the N-base layer 4 is simply used as a substrate.

Note that even in the case of the horizontal type, the N-bar and fur layers 11 may be provided as necessary, and the operation of the element is basically the same as in the case of the vertical type, so a description thereof will be omitted. Although the horizontal structure is inferior to the vertical structure in terms of withstand voltage and current, it has the advantage of not requiring electrodes on the back of the substrate and can be made thinner overall.

Therefore, in order to obtain a conductivity modulated MOS-FET with a short turn-off time by utilizing the idea of anode shorting, it is actually extremely difficult to obtain a vertical type MOS-FET as mentioned above.
It was thought that the horizontal structure would make it possible to short-circuit the anode relatively easily.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned points, and its purpose is to enable the adoption of an anode short structure in a conductivity modulation type MOS-FET, and to provide a practically valuable semiconductor device with a short turn-off time. be.

[Key points of the invention]

The present invention relates to a drain region of a horizontal conductivity modulation type MOS-FET in which a source region, a channel forming region, a gate region, and a drain region are formed on the same plane of a semiconductor substrate.
By adopting an anode short structure in which the drain electrode is connected to both the base layer and the drain layer of the opposite conductivity type, carriers accumulated in the base layer can easily escape.
This allows the turn-off time to be shortened.

[Embodiments of the invention]

The present invention will be explained below based on examples.

In order to show the structure of the horizontal conductivity modulation type MOS-FET of the present invention, FIG. 1 is a sectional view of a main part thereof, and FIG. 2 is a corresponding plan view. In both figures, the same reference numerals are used for parts common to FIG. 5.

As is clear from a comparison between FIG. 1 and FIG. 5, the feature of the present invention is that in order to create an anode short structure, the drain [pole 3 is connected to the P drain layer 7 and + at the element surface.

It is connected across both the N and Far layers 11, so that electrons can escape to the drain region without passing through the P drain layer 7.

At this time, the N-bar and far layers 11 may not be provided, and in that case, the same effect can be obtained by providing them so as to be in contact with the drain electrode 3, the LiP drain layer 7, and the N-base layer 4. The structures shown in Figure 1 and WfJ2 apply the anode short circuit to the horizontal type, which could not be easily achieved with the vertical type element as shown in Figure 4, by simply changing the diffusion mask pattern of the conventional horizontal structure. It is also possible to arbitrarily adjust the contact area between the N-bar, 2-fa single layer 11 and the drain electrode 3. The present invention has a vertical type with a thickness of 350 μm.
Whereas it requires digging, by making it horizontal, it can be done with simple flat processing techniques.

Thus, although the turn-off time of the device was approximately several tens of microns in the vertical conductivity modulation type MOS-FET shown in FIG.
By applying the anode short circuit to the above, it is possible to reduce the number of equations to less than 8, and in addition, the horizontal type has advantages over the vertical type, such as the thinness of the element and the fact that it does not require a back electrode. It has both aspects.

〔Effect of the invention〕

One of the drawbacks of conventional conductivity modulated MOS-FETs is the long turn-off time, and to solve this problem, it is effective not only to use a life 4-im killer but also to adopt an anode short structure. However, applying it to vertical type electrons was extremely difficult in terms of processing.
In the present invention, as described in the embodiment, horizontal MOS-FET
Since the anode short structure can be achieved by simply changing the manufacturing procedure, the turn-off time can be shortened, and the advantages of the horizontal structure can also be utilized.

[Brief explanation of the drawing]

Fig. 1 is a sectional view of the main part of the conductivity modulated MOS-FET according to the present invention, Fig. 2 is a plan view of the same, and Fig. 3 is a sectional view of the main part of the conventional conductivity modulated vertical type M (JS-FET). Figure 4 is a sectional view of the main part when the anode short structure is also used, and Fig. 5 is a sectional view of the main part of a conventional conductivity modulation type MOS-NET.l... Source polarization, 2. ...Gate electrode, 3...Drain electrode i, 4...N-base layer, 5...P layer, 6
...P base layer, 7...P drain layer, 8...
・N source layer, 9...gate polysilicon layer, 10・
...Insulating oxide film, 11...N bar, fur layer, 12...
・Gate d. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1) A conductivity-modulated lateral MOS-FET in which a source region, a channel formation region, a gate with an oxide film interposed therebetween, and a drain region are formed on one main surface of a semiconductor substrate of one conductivity type, wherein the drain region is A conductivity-modulated lateral MOS characterized by having a drain electrode connected at the surface across both a conductivity type base layer and an opposite conductivity type drain layer.
-FET.