JPS5984928U - switching circuit - Google Patents
switching circuitInfo
- Publication number
- JPS5984928U JPS5984928U JP17848482U JP17848482U JPS5984928U JP S5984928 U JPS5984928 U JP S5984928U JP 17848482 U JP17848482 U JP 17848482U JP 17848482 U JP17848482 U JP 17848482U JP S5984928 U JPS5984928 U JP S5984928U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- input signal
- switching circuit
- connection point
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案になる切換回路の一実施例を示す回路図
であり、第2図は本考案の他の実施例を、示す回路図で
ある。 ゛
1.2・・・入力端子、3,4・・・ピン、Ql・・・
NPNトランジスタ、Q2・・・PNP )ラジジスタ
、A・・・共通エミッタ接続点。FIG. 1 is a circuit diagram showing one embodiment of a switching circuit according to the present invention, and FIG. 2 is a circuit diagram showing another embodiment of the present invention.゛1.2...Input terminal, 3,4...Pin, Ql...
NPN transistor, Q2...PNP) radiator, A...common emitter connection point.
Claims (1)
に接続された第1のトランジスタと、ベースに第2の入
力信号が印加され、コレクタが接地側に接続された第1
のトランジスタとは極性の異なる第2のトランジスタと
、これら第1、第2のトランジスタの共通エミッタ接続
点に一端が接続された負荷インピーダンスとを具備し、
負荷インピーダンスの他端を高レベル電位に、あるいは
低レベル電位に接続することにより共通エミッタ接続点
より第1あるいは第2の入力信号のいずれか一方を得る
ようにしたことを特徴とする切換回路。a first transistor having a base to which a first input signal is applied and a collector connected to a power supply side; a first transistor to which a second input signal is applied to a base and a collector connected to a ground side;
a second transistor having a polarity different from that of the transistor, and a load impedance having one end connected to a common emitter connection point of the first and second transistors,
A switching circuit characterized in that either the first or second input signal is obtained from a common emitter connection point by connecting the other end of a load impedance to a high level potential or to a low level potential.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17848482U JPS5984928U (en) | 1982-11-27 | 1982-11-27 | switching circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17848482U JPS5984928U (en) | 1982-11-27 | 1982-11-27 | switching circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5984928U true JPS5984928U (en) | 1984-06-08 |
Family
ID=30387493
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17848482U Pending JPS5984928U (en) | 1982-11-27 | 1982-11-27 | switching circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5984928U (en) |
-
1982
- 1982-11-27 JP JP17848482U patent/JPS5984928U/en active Pending
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