JPS5847916U - constant voltage circuit - Google Patents
constant voltage circuitInfo
- Publication number
- JPS5847916U JPS5847916U JP14141981U JP14141981U JPS5847916U JP S5847916 U JPS5847916 U JP S5847916U JP 14141981 U JP14141981 U JP 14141981U JP 14141981 U JP14141981 U JP 14141981U JP S5847916 U JPS5847916 U JP S5847916U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- collector
- base
- constant voltage
- voltage circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の定電圧回路の回路例を、第２図は本考案
の実施例を示す。 −
１ニブレストークスイツチ、２：ツェナーダイオード、
３：入力端子、４：出力端子、５． ６． ９゜１０：
）ランジスタ。FIG. 1 shows an example of a conventional constant voltage circuit, and FIG. 2 shows an embodiment of the present invention. - 1 nibble talk switch, 2: Zener diode,
3: input terminal, 4: output terminal, 5. 6. 9°10:
) Langista.
Claims (1)
にツェナーダイオードを接続し、ＮＰＮ形の第２のトラ
ンジスタのエミッタと第１のトランジスタのベースを接
続し、第２のトランジスタのコレクタと第１のトランジ
スタのコレクタを抵抗を介して接続し、第２のトランジ
スタのベースと第１のトランジスタのコレクタを抵抗を
介して接続し、ＮＰＮ形の第３のトランジスタのコレク
タを第２のトランジスタのベースへ接続し、第３のトラ
ンジスタのエミッタをアースへ接続し、第３のトランジ
スタのベースと第１のトランジスタのコレクタを抵抗を
介して接続し、第３のトランジスタのベースとアースの
間を開閉することにより制御し、第１のトランジスタの
コレクタを入力端子、エミッタを出力端子とすることを
特徴とする定電圧回路。A Zener diode is connected between the base and ground of the first (7) NPN type transistor, the emitter of the second transistor of the NPN type and the base of the first transistor are connected, and the collector of the second transistor and the second transistor are connected. The collector of the first transistor is connected via a resistor, the base of the second transistor is connected to the collector of the first transistor via a resistor, and the collector of the third NPN transistor is connected to the base of the second transistor. , connect the emitter of the third transistor to ground, connect the base of the third transistor and the collector of the first transistor via a resistor, and open/close between the base of the third transistor and ground. A constant voltage circuit characterized in that the collector of the first transistor is used as an input terminal, and the emitter of the first transistor is used as an output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14141981U JPS5847916U (en) | 1981-09-25 | 1981-09-25 | constant voltage circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14141981U JPS5847916U (en) | 1981-09-25 | 1981-09-25 | constant voltage circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5847916U true JPS5847916U (en) | 1983-03-31 |
Family
ID=29934518
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14141981U Pending JPS5847916U (en) | 1981-09-25 | 1981-09-25 | constant voltage circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5847916U (en) |
-
1981
- 1981-09-25 JP JP14141981U patent/JPS5847916U/en active Pending
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