JPS5978537A - Manufacture of resin-sealed semiconductor device - Google Patents

Manufacture of resin-sealed semiconductor device

Info

Publication number
JPS5978537A
JPS5978537A JP18965982A JP18965982A JPS5978537A JP S5978537 A JPS5978537 A JP S5978537A JP 18965982 A JP18965982 A JP 18965982A JP 18965982 A JP18965982 A JP 18965982A JP S5978537 A JPS5978537 A JP S5978537A
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor element
resin
semiconductor device
mold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18965982A
Other languages
Japanese (ja)
Inventor
Takashi Emura
隆志 江村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP18965982A priority Critical patent/JPS5978537A/en
Publication of JPS5978537A publication Critical patent/JPS5978537A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To enable to produce transistors which have the same resin-sealing mold and different power consumptions by preparing leadframes which are different in response to the power consumptions of semiconductor elements in the thickness of only the element mounts of the leadframes. CONSTITUTION:A leadframe 14 in which bolt inserting holes 11 formed by punching a metal plate, a semiconductor element mount 12 and a plurality of leads 13 are integrally formed, is prepared. The mounts 12 are formed in different thickness in response to the power consumptions and formed in a projection shape as compared with the other parts. A semiconductor element 15 is secured to the mount 12 of the leadframe 14, and the electrodes of the element 15 and the leads 13 are connected by bonding wires. The lower surface of the lead frame 14 is intimately secured to a bottom force 16, the upper surface is covered with a space 17 by top force 18, the end of a fixing pin 19 integral with the mold 18 is inserted into a round hole 11, and the leadframe 14 is urged by the step 191 at the intermediate of the pin 19 to the bottom force 16.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は樹脂封止型半導体装置の製造方法に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method of manufacturing a resin-sealed semiconductor device.

(ロ)従来技術 出θ用樹脂封止型半導体装置は第1図に示す如く、ボル
ト挿入用丸孔(1)、半導体素子取付部(2)および折
り曲げられたリード(3)が一体に形成されたリードフ
レーム(4)を準備する。この取付部(2)に半導体素
子(5)を固着し且つ所望のリード(3)とボンディン
グ接続する。その後リードフレーム(4)の下面を下金
型(6)に密着させ、リードフレーム(4)の上面には
半導体素子(5)を封止する空間部(7)を有する上金
型(8)を当接し、上金型(8)と同一体の固定用ピン
(9)を丸孔(1)に挿入してリードフレーム(4)を
下金型(6)に押し付けた状態で空間部(7)に樹脂(
10)を注入して半導体素子(5)を封止していた。
(b) As shown in Fig. 1, the conventional θ resin-sealed semiconductor device has a round hole for bolt insertion (1), a semiconductor element mounting portion (2), and a bent lead (3) formed integrally. Prepare the lead frame (4). A semiconductor element (5) is fixed to this attachment part (2) and connected to a desired lead (3) by bonding. Thereafter, the lower surface of the lead frame (4) is brought into close contact with the lower mold (6), and the upper mold (8) having a space (7) for sealing the semiconductor element (5) is formed on the upper surface of the lead frame (4). are pressed against the lower mold (6) by inserting the fixing pin (9), which is the same as the upper mold (8), into the round hole (1) and pressing the lead frame (4) against the lower mold (6). 7) Add resin (
10) was injected to seal the semiconductor element (5).

しかしながら斯る方法ではリードフレーム(4)に組み
込む半導体素子(5)の消費電力に応じて第2図に示す
如く、リードフレーム(4)の厚みtを異ならしめて放
熱特性を改善した場合、固定用ピン(9)がリードフレ
ーム(4)の厚みにより同一寸法でなくなるためリード
フレーム(4)の厚みに応じて樹脂封止用の金型を準備
する必要があった。
However, in such a method, if the thickness t of the lead frame (4) is varied to improve heat dissipation characteristics as shown in Fig. 2 according to the power consumption of the semiconductor element (5) to be assembled into the lead frame (4), the fixing Since the pins (9) do not have the same dimensions depending on the thickness of the lead frame (4), it was necessary to prepare a mold for resin sealing according to the thickness of the lead frame (4).

(ハ) 目的 本発明は押上した従来の欠点に鑑みてなされ、従来の欠
点を除去した樹脂封止型半導体装置の製造方法を提供す
るものである。
(c) Object The present invention was made in view of the disadvantages of the conventional method, and provides a method for manufacturing a resin-sealed semiconductor device that eliminates the disadvantages of the conventional method.

に)構成 本発明は複数のリード、半導体素子取付部及び取付用の
丸孔を一体に形成したリードフレームの取付部の厚みの
みを固着する半導体素子の消費電力に応じて異ならしめ
て、同一の樹脂封止金型で生産する様に構成している。
2) Structure The present invention is a lead frame in which a plurality of leads, a semiconductor element mounting part, and a round hole for mounting are integrally formed, and only the thickness of the mounting part of the lead frame is varied according to the power consumption of the semiconductor element to be fixed, and the same resin is used. It is configured to be produced using a sealed mold.

(ホ)実施例 本発明に依れば、金属板を打抜き加工してボルト挿入用
孔(11)、半導体素子取付部02)および複数のリー
ド(131を一体に形成したリードフレーム(14)を
準備する。この取付部02は消費電力に応じてその厚み
を異ならしめて第3図の如く他の部分より凸状にする。
(E) Embodiment According to the present invention, a lead frame (14) is formed by punching a metal plate and integrally forming a bolt insertion hole (11), a semiconductor element mounting part 02) and a plurality of leads (131). The mounting part 02 is made to have a different thickness depending on the power consumption and to be more convex than other parts as shown in FIG.

リードフレーム04)の取付部(121には半導体素子
(15)を固着し、素子α粉の各電極とり一ド0りとを
ボンデインクワイヤーにより接続−[る。
The semiconductor element (15) is fixed to the mounting part (121) of the lead frame (04), and each electrode of the element α powder is connected to one electrode using a bond wire.

斯るリードフレーム(14)はその下面を下金型0〔i
)に密着して固定し、リードフレーム(14)の上面は
上金型08)によって空間部(17)を設けて覆い、旧
つ上金型(I81と一体の固定用ピン0鵠の先端を丸孔
(11)に挿入し固定用ピンa9の中間に設けた段部(
19J、)でリードフレーム(1イ)を下金型(I6)
に押し付ける。l’fお空間部07)には半導体素子(
1■が含まれている。
The lower surface of such lead frame (14) is attached to the lower mold 0 [i
), and the upper surface of the lead frame (14) is covered with a space (17) by the upper mold 08), and the tip of the fixing pin 0 integrated with the old upper mold (I81) is fixed. The step part inserted into the round hole (11) and provided in the middle of the fixing pin a9
19J, ) to lower the lead frame (1A) to the lower mold (I6).
to press against. l'f space 07) has a semiconductor element (
1■ is included.

斯」ニした状態で空間部07)には液状のエポキシ樹脂
(イ)を注入し硬化する。然る後金型より取り出して不
要のリードフレーム部分を切断除去して樹脂封止型半導
体装置を完成する。
In this state, liquid epoxy resin (a) is injected into the space 07) and hardened. Thereafter, the resin-sealed semiconductor device is completed by taking it out from the mold and cutting off unnecessary lead frame parts.

(へ)効果 本発明に依ればリードフレーム(14)の素子取伺部0
21のみの厚みを半導体素子(+5+の消費電力に応じ
て厚さを異ならしめたリードフレーム(14)を準備す
ることにより、同一の樹脂封止金型で消費電力の異なる
トランジスタを生産することが可能となる。
(F) Effect According to the present invention, the element receiving portion of the lead frame (14) is 0.
By preparing lead frames (14) with different thicknesses depending on the power consumption of the semiconductor element (+5+), transistors with different power consumption can be produced using the same resin molding mold. It becomes possible.

この結果大巾に生産コストの低減を図れる利点を有する
As a result, there is an advantage that production costs can be significantly reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来例を説明する断面図、第3図
は本発明を説明する断面図である。 主な図mの説明 (11)は丸孔、 0本ま半導体素子取付部、 0りは
リード、 (14)はリードフレーム、 (15)は半
導体素子、θ6)は上金型、 (国は下金型、 (I9
は固定用ピンである。 第1図
FIGS. 1 and 2 are cross-sectional views for explaining a conventional example, and FIG. 3 is a cross-sectional view for explaining the present invention. Explanation of the main figure m (11) is a round hole, 0 semiconductor element mounting part, 0 is a lead, (14) is a lead frame, (15) is a semiconductor element, θ6) is an upper mold, (the country is Lower mold, (I9
is a fixing pin. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 1、複数のリード、半導体素子取付部及び取付用の丸孔
を一体に形成したリードフレームに半導体素子をl′i
!I′INシた後、該リードフレームの下面を下金型に
密着させ、前記リードフレームの上面に前記半導体素子
を含む空間部を有する」二金型を当接し、該止金型と一
体の固定用ピンな前記丸孔に挿入し且つ前記リードフレ
ームを前記下金型に押し付け、前記空間部に樹脂を注入
して前記半導体素子を封止する樹脂封止型半導体装置の
製造方法において、前記リードフレームの半導体素子取
付部を前記半導体素子の消費電力に応じて厚さを異なら
しめて同一の上下金型で樹脂封止をすることを特徴とす
る樹脂封止型半導体装置の製造方法。
1. A semiconductor device is mounted on a lead frame that has a plurality of leads, a semiconductor device mounting portion, and a round hole for mounting.
! After the I'IN process, the lower surface of the lead frame is brought into close contact with the lower mold, and the upper surface of the lead frame is brought into contact with a second mold having a space containing the semiconductor element, and a In the method for manufacturing a resin-sealed semiconductor device, the semiconductor element is sealed by inserting a fixing pin into the round hole, pressing the lead frame against the lower mold, and injecting resin into the space. A method for manufacturing a resin-sealed semiconductor device, characterized in that the thickness of a semiconductor element mounting portion of a lead frame is varied depending on the power consumption of the semiconductor element, and resin sealing is performed using the same upper and lower molds.
JP18965982A 1982-10-27 1982-10-27 Manufacture of resin-sealed semiconductor device Pending JPS5978537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18965982A JPS5978537A (en) 1982-10-27 1982-10-27 Manufacture of resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18965982A JPS5978537A (en) 1982-10-27 1982-10-27 Manufacture of resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS5978537A true JPS5978537A (en) 1984-05-07

Family

ID=16245016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18965982A Pending JPS5978537A (en) 1982-10-27 1982-10-27 Manufacture of resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS5978537A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6288347A (en) * 1985-10-15 1987-04-22 Shindengen Electric Mfg Co Ltd Resin sealing type semiconductor device
JP2010129868A (en) * 2008-11-28 2010-06-10 Mitsubishi Electric Corp Semiconductor module for power and method of manufacturing the same
DE102015112450B3 (en) * 2015-07-30 2016-12-29 Danfoss Silicon Power Gmbh Power semiconductor module and method for manufacturing a power module and the power semiconductor module

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6288347A (en) * 1985-10-15 1987-04-22 Shindengen Electric Mfg Co Ltd Resin sealing type semiconductor device
JP2010129868A (en) * 2008-11-28 2010-06-10 Mitsubishi Electric Corp Semiconductor module for power and method of manufacturing the same
US8299601B2 (en) 2008-11-28 2012-10-30 Mitsubishi Electric Corporation Power semiconductor module and manufacturing method thereof
DE102015112450B3 (en) * 2015-07-30 2016-12-29 Danfoss Silicon Power Gmbh Power semiconductor module and method for manufacturing a power module and the power semiconductor module

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