JPS5910242A - Resin-sealed type semiconductor device - Google Patents
Resin-sealed type semiconductor deviceInfo
- Publication number
- JPS5910242A JPS5910242A JP11856582A JP11856582A JPS5910242A JP S5910242 A JPS5910242 A JP S5910242A JP 11856582 A JP11856582 A JP 11856582A JP 11856582 A JP11856582 A JP 11856582A JP S5910242 A JPS5910242 A JP S5910242A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- header
- semiconductor device
- droop
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は樹脂封止型半導体装置における放熱体構造に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a heat sink structure in a resin-sealed semiconductor device.
樹脂封止型半導体装置は、銅のごとき熱良導性の金属厚
板からなるヘッダと称する放熱体の上にパワー用トラン
ジスタやノくワー用Ｉ Ｃ（集ｆｉ回路）の形成された
半導体素子を接続し、放熱体と一体的に形成した複数の
外部リードと半導体素子の電極との間をワイヤと称する
金線を介して電気的に接続した後、半導体素子を包囲す
るように有機相のリードの外端を樹脂体の外部に露出さ
せるとともに、放熱体の底面を樹脂体の底面と同じ平面
として露出させるものである。A resin-sealed semiconductor device is a semiconductor element in which power transistors and power ICs (integrated FI circuits) are formed on a heat sink called a header made of a thick plate of a metal with good thermal conductivity such as copper. After connecting the plurality of external leads integrally formed with the heat sink and the electrodes of the semiconductor element through gold wires called wires, an organic phase is formed so as to surround the semiconductor element. The outer ends of the leads are exposed to the outside of the resin body, and the bottom surface of the heat sink is exposed as the same plane as the bottom surface of the resin body.
ところで、上記の放熱体は金属厚板をプレス機によシ機
械加工して所定の輪郭に形成されるが金属厚板を打ち抜
く際に、プレスの金型が最初にあたる面の切断部に「ダ
レ」と呼ばれる潰れた縁部が生じるとともに金型が脱出
する面の切断部には、「パリ」と呼ばれる突起が生じる
のが普通である。By the way, the above-mentioned heat radiator is formed into a predetermined contour by machining a thick metal plate using a press machine, but when punching out the metal plate, there is a ``sag'' in the cut part of the surface that the press die first hits. It is common for a flattened edge called "" to occur and a protrusion called "paris" to occur at the cut portion of the surface from which the mold escapes.
このような「ダレ」及び「パリ」を有する放熱体を用い
て樹脂封止半導体装置を製造するにあたって、「パリ」
のある面を下にした場合、第１図に示すように樹脂体２
によシ封止された放熱体１の露出する下面で「パリ」３
が突出して実装される配線基板に損傷を与えることがあ
シ、予め「パリ」取シ作業を行々う必要がある。一方、
「パリ」のある面を上にすれば、第２図に示すように、
放熱体の下面の「ダレ」部分４に樹脂体が回υこみ、「
樹脂のパリ」５を生じることによシ、半導体装定に実装
するために「樹脂のパリ」を取る作業が必要となった。When manufacturing a resin-sealed semiconductor device using a heat sink having such "sag" and "paris", "paris"
When one side is facing down, the resin body 2
"Paris" 3 on the exposed lower surface of the heat sink 1 sealed by
In order to avoid the risk of protruding and damaging the wiring board on which it is mounted, it is necessary to remove the "burrs" in advance. on the other hand,
If you turn the "Paris" side up, as shown in Figure 2,
The resin body is rotated into the "sagging" part 4 on the bottom surface of the heat sink.
Due to the formation of "resin particles" 5, it became necessary to remove the "resin particles" in order to mount the semiconductor device.
本発明は上記した問題を解消するもので、その目的とす
るところは、半導体装置の外観を向上するとともにパリ
取り作業を不要とする放熱体「ヘッダ」の提供にあり、
以下実施例に従って具体的に説明する。The present invention solves the above-mentioned problems, and its purpose is to provide a heat sink "header" that improves the appearance of a semiconductor device and eliminates the need for deburring work.
A detailed explanation will be given below according to examples.
第３図に本発明を樹脂封止型パワー用トランジスタに適
用した場合の例が示される。同図において、１は放熱板
ヘッダで１ダレ」４のある面を下面として「パリ」のあ
る上面に、トランジスタ素子６を接続（ペレットボンデ
ィング）し、外部リード７と素子６の電極とを金ワイヤ
８により接続し、樹脂体２によシ封止しである。上記放
熱体の露出する下面（底面）には、樹脂体によシ囲まれ
た周辺部が突出するように底面内に浅い凹陥部９が形成
しである。第４図に第３図におけるＡ部分が拡大図示さ
れている。同図に示すようにヘッダの形状として樹脂モ
ールド後の樹脂体裏面に露出する底面の突出する縁部１
０の幅ａを約０．１１１１、凹陥部の深さｂを約０．０
：ｌ）ｍ程度とすることによりモールドの際の樹脂の回
シ込みが一部なくとも上記突出部１００幅ａ以下に抑え
られ「樹脂のパリ」の発生を防止することができる。FIG. 3 shows an example in which the present invention is applied to a resin-sealed power transistor. In the figure, 1 is a heat sink header, and the transistor element 6 is connected (pellet bonding) to the upper surface with the "paris" with the surface with the "1 sag" 4 as the bottom surface, and the external lead 7 and the electrode of the element 6 are bonded with gold. It is connected by a wire 8 and sealed with a resin body 2. A shallow recess 9 is formed in the exposed lower surface (bottom surface) of the heat sink so that the peripheral portion surrounded by the resin body protrudes. FIG. 4 shows an enlarged view of portion A in FIG. 3. As shown in the figure, the shape of the header is the protruding edge 1 of the bottom surface exposed on the back surface of the resin body after resin molding.
The width a of 0 is approximately 0.1111, and the depth b of the recess is approximately 0.0.
By setting the width to about 1) m, even if some of the resin is not squeezed in during molding, it can be suppressed to the width a of the protrusion 100 or less, and the occurrence of "resin cracks" can be prevented.
第５図乃至第８図に本発明による樹脂封止型パワートラ
ンジスタを得るための製造工程の一部が示される。これ
を工程順に説明すると下記の通シである。5 to 8 show a part of the manufacturing process for obtaining a resin-sealed power transistor according to the present invention. This is explained in the order of steps as follows.
（１）銅系の厚板材から第１の金型１１を用いてプレス
しヘッダ部材１を打ち抜き形成する（第５図）。(1) A header member 1 is punched out from a copper-based thick plate material by pressing using a first mold 11 (FIG. 5).
このとき、ヘッダ部材に「パリ」３及び「ダレ」４が生
じる。At this time, "burr" 3 and "sag" 4 occur in the header member.
（２１第２の金型１２を用いてプレスヘッダ部材）「ダ
レ」を有する面に凹陥部９を形成する（第６図）。(21 Press header member using second mold 12) A concave portion 9 is formed on the surface having a "sag" (FIG. 6).
（３）ヘッダ部材の「パリ」のある面を上にし、半導体
６を接続（ペレットボンディング）し、次いで素子の電
極とリード７との間を金ワイヤ８で接続（ワイヤボンデ
ィング）する（第７図）。(3) Connect the semiconductor 6 (pellet bonding) with the surface of the header member facing up, and then connect the electrodes of the element and the leads 7 with gold wires 8 (wire bonding). figure).
（４）素子の接続されたヘッダ１をモールド型（図示し
々い）内に装填し、エポキシ系樹脂等によシ成形（モー
ルド）して樹脂封止体２をつくる。第８図は完成した樹
脂封止型半導体装置の側面から視た断面図、１３はビス
止め孔である。第９図は、同じく半導体装置の裏面を示
し、ヘッダ底面の凹陥部９により突出する縁部１０は、
樹脂封止体２によシ囲まれた周辺の一部に限られる。(4) The header 1 to which the elements are connected is loaded into a mold (not shown) and molded with epoxy resin or the like to form the resin sealing body 2. FIG. 8 is a sectional view of the completed resin-sealed semiconductor device viewed from the side, and 13 is a screw hole. FIG. 9 similarly shows the back side of the semiconductor device, and the edge 10 protruding from the recess 9 on the bottom of the header is
It is limited to a part of the periphery surrounded by the resin sealing body 2.
以上実施例によシ述べた本発明によればヘッダの樹脂封
止体よシ露出する底面に凹陥部を形成しておくことによ
り、ヘッダの「ダレ」のある近傍で周囲の樹脂体は部分
的に接触するため、その部分の面圧が高くなシ「樹脂の
パリ」の発生が阻止されると同時に、樹脂の１もれ」を
防止することができ、外観上の見苦しさがなくなるとと
もに、パリ取り作業が不要となり、コスト節減ができる
等の諸効果がもたらされる。According to the present invention described in the embodiments above, by forming a concave portion on the bottom surface exposed from the resin sealing body of the header, the surrounding resin body is partially removed in the vicinity of the “sag” of the header. This prevents the occurrence of "resin flakes" due to the high surface pressure at that part, and also prevents "resin leakage", which eliminates the unsightly appearance. This eliminates the need for deburring work, resulting in various effects such as cost savings.
本発明は前記実施例に限定されることなく、他の形式の
半導体装置のヘッダにも同様に応用できる。第１０図は
樹脂封止型パワーＩＣに本発明を適用した例を裏面図で
示すものである。この場合、樹脂封止体はヘッダの周辺
全部を囲み、ヘッダ底面の凹陥部によって突出する縁部
１０は、周辺全部にわたっている。The present invention is not limited to the embodiments described above, but can be similarly applied to headers of other types of semiconductor devices. FIG. 10 is a back view showing an example in which the present invention is applied to a resin-sealed power IC. In this case, the resin sealing body surrounds the entire periphery of the header, and the edge 10 protruding from the recessed portion on the bottom surface of the header extends over the entire periphery.
本発明は高消費電力用のＩＣに適用して特に有効である
。The present invention is particularly effective when applied to ICs for high power consumption.
第１図及び第２図は在来の樹脂封止型トランジスタの例
を内部構造で示す断面図である。
第３図は本発明による樹脂封止型トランジスタの実施例
を示す断面図。
第４図は第３図におけるＡ部拡大図である。
第５図乃至第８図は本発明による樹脂封止型半導体装置
の製造プロセスの一部を示し、第５図〜第７図は正面断
面図であられし、第８図は側面断面図によりあられす。
第９図及び第１０図は本発明による樹脂封止型半導体装
置の各実施例を示す底面図である。
１・・・放熱体（ヘッダ）、２・・・樹脂封止体−３・
・・「パリ」、４・・「ダレ」、５・・・「樹脂のパリ
」、６・・・半導体素子、７・・・リード、８・・・金
ワイヤ、９凹陥部、１０・・・突出縁部、１１・・・第
１の金型、１２・・・第２の金型、１３・・・ビス止め
孔。
第 １ 図
第 ３ 図
第 ４ 図
第 ５ 図
第 ７ 図
第 ８ 図FIGS. 1 and 2 are cross-sectional views showing the internal structure of an example of a conventional resin-sealed transistor. FIG. 3 is a sectional view showing an embodiment of a resin-sealed transistor according to the present invention. FIG. 4 is an enlarged view of section A in FIG. 3. 5 to 8 show a part of the manufacturing process of a resin-sealed semiconductor device according to the present invention, FIGS. 5 to 7 are front sectional views, and FIG. 8 is a side sectional view. vinegar. FIGS. 9 and 10 are bottom views showing each embodiment of the resin-sealed semiconductor device according to the present invention. 1... Heat sink (header), 2... Resin sealing body-3.
... "Paris", 4... "sag", 5... "resin pari", 6... semiconductor element, 7... lead, 8... gold wire, 9 recessed part, 10... -Protruding edge, 11...first mold, 12...second mold, 13...screw fixing hole. Figure 1 Figure 3 Figure 4 Figure 5 Figure 7 Figure 8
Claims (1)
を包囲１〜、放熱体の底面と同じ平面にその底面を有す
る樹脂体によシ封止して成る樹脂封止型半導体装置にお
いて、上記放熱体底面の周辺部は突出していることを特
徴とする樹脂封止型半導体装置。1. In a resin-sealed semiconductor device in which a semiconductor element is connected to a heat sink, and the semiconductor element is surrounded by a resin body whose bottom surface is on the same plane as the bottom surface of the heat sink. . A resin-sealed semiconductor device, wherein a peripheral portion of the bottom surface of the heat sink is protruded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11856582A JPS5910242A (en) | 1982-07-09 | 1982-07-09 | Resin-sealed type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11856582A JPS5910242A (en) | 1982-07-09 | 1982-07-09 | Resin-sealed type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5910242A true JPS5910242A (en) | 1984-01-19 |
Family
ID=14739738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11856582A Pending JPS5910242A (en) | 1982-07-09 | 1982-07-09 | Resin-sealed type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5910242A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0237756A (en) * | 1988-07-28 | 1990-02-07 | Citizen Watch Co Ltd | Semiconductor device with heat sink |
| JP2010199494A (en) * | 2009-02-27 | 2010-09-09 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method of the same |
| WO2013065474A1 (en) * | 2011-10-31 | 2013-05-10 | ローム株式会社 | Semiconductor device |
| JP2014007294A (en) * | 2012-06-25 | 2014-01-16 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method of the same |
-
1982
- 1982-07-09 JP JP11856582A patent/JPS5910242A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0237756A (en) * | 1988-07-28 | 1990-02-07 | Citizen Watch Co Ltd | Semiconductor device with heat sink |
| JP2010199494A (en) * | 2009-02-27 | 2010-09-09 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method of the same |
| US9905499B2 (en) | 2011-10-30 | 2018-02-27 | Rohm Co., Ltd. | Semiconductor device |
| WO2013065474A1 (en) * | 2011-10-31 | 2013-05-10 | ローム株式会社 | Semiconductor device |
| CN104025287A (en) * | 2011-10-31 | 2014-09-03 | 罗姆股份有限公司 | Semiconductor device |
| US9070659B2 (en) | 2011-10-31 | 2015-06-30 | Rohm Co., Ltd. | Semiconductor device |
| US9613883B2 (en) | 2011-10-31 | 2017-04-04 | Rohm Co., Ltd. | Semiconductor device |
| US10504822B2 (en) | 2011-10-31 | 2019-12-10 | Rohm Co., Ltd. | Semiconductor device |
| JP2014007294A (en) * | 2012-06-25 | 2014-01-16 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method of the same |
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