JPS5970376A - Hard copy device of crt display screen - Google Patents

Abstract

PURPOSE:To attain quickly the up date of a CRT screen even during hard copy, by storing the display data flow of CRT screen in a copy use buffer memory in high speed and transferring the stored data to a dot printer. CONSTITUTION:The flow of the CRT screen display data which is being transferred from a refresh memory 3 to a dot pattern generating circuit 4 is stored into the copy use buffer memory 18 in the unit of one screen from a screen copy controller 14. The stored data is transferred to the dot printer 7 through the dot pattern generating circuit 6 at a time not being the effective display period of the CRT.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a hard copy device for a CRT display screen that hard copies CRT display contents using a raster scan method onto a dot link.

[Prior art]

Conventionally, there have been three methods described below as means for outputting a hard copy of a CRT display screen to a dot printer.

FIG. 1 shows an example of the configuration of a hard copy device using method 1 above. Microcomputer 1 that always controls the whole thing
A CRT display control circuit 2 is connected to the CRT display control circuit 2, which controls a refresh memory 3 and a dot pattern generation circuit 4, and the refresh memory 3 is connected to the dot pattern generation circuit 4. This dot pattern generation circuit 4 is connected to a serial/parallel conversion circuit 5 and a printer buffer 6, and this printer buffer 6 is connected to a dot printer 7. Further, the video signal 8 which is the output of the serial/parallel conversion circuit 5 is input to a CRT (not shown), and the contents of the refresh memory 3 are displayed on this CR,T. C
The contents of the refresh memory 3 designated by the refresh memory address 9 output by the R, T display control circuit 2 are read out and input to the dot pattern generation circuit 4.

Also, raster address 1o of C'fLT display control circuit 2
The dot pattern generation circuit 4 is configured so that when displaying the pixel-developed data of the dot pattern generation circuit 4 on CR and T, it is sent sequentially in the horizontal direction of the screen, and when printing on a dot printer paper, it is sent sequentially in the vertical direction. Control.

The microcomputer 1 reads out the contents of the fresh memory 3 one character at a time while calculating the address, the read contents are expanded into pixels by the dot pattern generation circuit 4, and some of this pixel data is stored in the printer buffer 6. The contents of the refresh memory 3 are transferred to the dot printer and printed.

The above method has the advantage that it requires no extra hardware and has the simplest configuration, but the contents of the refresh memory 3 are retained until the hard copy of the CRT display screen is completed, that is, until the output of the dot printer 7 is completed. This has the disadvantage that the screen cannot be updated arbitrarily during this time.

FIG. 2 shows an example of the configuration of a conventional hard copy device using method 2. This example has the same configuration as the example shown in FIG. 1, but differs in that it has a copy buffer memory 11 as part of the refresh memory 3.

In the dot printer 7, it takes several tens of seconds to make a hard copy of one screen due to the movement of the mechanical parts, and during this time the CRT
The display screen cannot be updated and the processing performance of the system decreases. The example shown in FIG. 2 compensates for this drawback by separately providing a buffer memory 11 for copying with a capacity equivalent to the display screen of CR1. 1 from the refresh memory 3 to the copy buffer memory 11 while calculating the address of the refresh memory 3 that is
Data is transferred word by word. Next, data for the printer is transferred from this backup memory 11 for copying to the dot printer 7 via the dot pattern generation circuit 4 to make a hard copy, so the contents of the refresh memory 3 are arbitrarily changed on the CRT display screen during this time. You can update the screen.

However, this method has the disadvantage that the data transfer process from the refresh memory 3 to the copy buffer memory 11 occupies a large proportion of the processing execution time of the microcomputer 1. For example, as shown in FIG. 7, when the contents of two blocks on the refresh memory 3 are combined to display the screen 12, when address calculation and condition judgment are performed, the microcomputer 1, it takes about 40 steps to transfer one character's worth of data. Now, it takes an average of 5 machine cycles per step, and 1 machine cycle is about 500 nS
If you toss a microcomputer with the performance of
When displaying 0 characters, it often takes about 0.2 seconds to transfer one screen.

During this period, the microcomputer 1 had the disadvantage that it was unable to respond to processing requests from other circuit devices, and also that the screen could not be updated quickly.

FIG. 3 shows an example of the configuration of a conventional hard copy device that employs method 3. In this example, the output of the dot pattern generation circuit 4 is converted into a video signal by the serial/parallel conversion circuit 5, which is then transferred to the dot printer 7, and from this video signal, the data is reorganized in the printer so as to reorganize one screen. This will rearrange the data and print based on this.

However, this method has the disadvantage that it is difficult to distinguish between even and odd fields from a CRT video signal that performs interlacing, and accurate note copying cannot be performed. Furthermore, the dot printer 7 can only be used as a note copy of the CRT display screen, and has the disadvantage that it is impossible to make the dot printer 7 output data independent of the CRT display.

[Purpose of the invention]

An object of the present invention is to eliminate the above-mentioned drawbacks, to be able to transfer data from the refresh memory to the copy buffer memory at high speed, and to transfer data from the refresh memory to the copy buffer memory even during note copying.
To provide a note copying device for a CRT display screen which can quickly update a T screen.

[Summary of the invention]

The present invention is an apparatus for hard copying the screen of a raster scan type CRT, in which the flow of data being sequentially read out from the refresh memory for display on the CR1 screen is stored in the copy buffer memory in real time by a screen copy control device. The above object is achieved by storing the data in the dot printer, and after the storage is completed, the microcomputer transfers the stored data to the dot printer and prints it in accordance with the speed of the dot printer.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings, using the same reference numerals for the same parts as in the conventional example. FIG. 4 is a block diagram showing an embodiment of the CRT display screen hard copy apparatus of the present invention. A CRT display control circuit 2 and a screen copy control device 14 are connected to a bus 13 of the microcomputer 1. C
The RT display control circuit 2 controls the refresh memory 3, the screen copy control device 14, and the dot pattern generation circuit 4.

Refresh memory 3 is connected to dot pattern generation circuit 4 via buffer 15. The refresh memory 3 is connected to the microcomputer 1 via a buffer 16.
It is connected to the bus 13 of.

A bus connecting the buffer 15 and the dot pattern generation circuit 4 is connected to the copy buffer memory 18 via the buffer 17.
This copy buffer (9) memory 18 is controlled by the screen copy control device 14,
This screen copy control device 14 further includes buffers 15 and 17.
control. The dot pattern generation circuit 4 is connected to a serial/parallel conversion circuit 5 and a printer buffer 6, the printer buffer 6 outputs print data to a dot printer 7, and the serial/parallel conversion circuit 5 outputs a video signal 8 to a CRT (not shown). .

On raster scan type CRTs, during screen display, C
In addition to the signals of the refresh memory address 9 and the raster address 10, the RT display control circuit 2 outputs a vertical synchronization signal, a horizontal synchronization signal, and a signal (DISPLAY) indicating that the display is in a valid display period. The contents of the refresh memory 3 specified by the refresh memory address 10 are read out, and the character code that is the read contents and the raster address 10 of the CRT display control circuit 2 are read out.
is supplied to the dot pattern generation circuit 4.

This dot pattern generation circuit 4 is a kind of memory,
The character code and raster address are regarded as addresses in this memory, and the output is a dot pattern (10). This dot pattern is converted into serial data by a serial/parallel conversion circuit 5, resulting in a video signal 8, which is displayed in stroke numbers on a CRT (not shown).

Next, when making a hard copy of the CR,T display screen,
The screen copy control device 14 switches the buffer 17 toward the copy buffer memory 18, reads the tail character code sequentially from the refresh memory 3, monitors the tail character code, and stores the data for one screen currently displayed in the copy buffer memory 18. Copies data and stores it in real time. After copying, the same contents as the current CRT display screen are stored in the copy packer memory 18, so even if the contents of the refresh memory 3 are rewritten and the screen is updated, it will not affect the hard copy output. not give.

Since the dot pattern generation circuit 4 is shared with the CR and T displays, data is transferred to the dot printer 7 while the CRT display is in the horizontal or vertical retrace period, that is, the dot pattern is generated not during the effective display period. When the circuit 4 is not used for CRT display, (11) the contents of the copy buffer memory 18 are read character by character as input to the dot pattern generation circuit 4 in place of the data from the refresh memory 3. Then, a dot pattern corresponding to the contents of the copy buffer memory 18 is supplied to the printer buffer 6, and this is temporarily stored in the buffer. The stored data is sequentially transferred to the dot printer 7 in accordance with the printing speed and printed.

FIG. 5 shows an example of the detailed structure of the screen copy control circuit, and FIG. 6 is a chart showing the timing of writing to the copy buffer memory.

When making a hard copy of the CRT display screen, the microcomputer 1 outputs the C0PYSET signal, which is input to the copy-next flip 70 knob 41.
This flip frog 41 is set. This C0PY
The SET signal is simultaneously input to the counter 42 and cleared to the initial value. After the copy-next flip-flop 41 is set, the immediately following vertical synchronizing signal V8YNC is input to the copy-second flip-flop (12) flip-flop 43 to set it. Copy secondary flip-flop 43 outputs to AND gate 44 and AND gate 46. Next, vertical synchronization signal V8YN
When C comes in, the copy secondary flip-flop 43 is reset, and the AND gate 44 outputs to reset the copy-next flip-flop 41 as well. Therefore, the output of the flip-flop 43 is transferred to a CRT (not shown).
Only one screen display time will be output.

The raster address signal RAS is input to the raster address decoder 47, but the raster address decoder 47 outputs the signal to the AND gate 46 only when a specific raster address is 10. In the example shown in FIG. 6, since the CRT display is in interlace mode, the output of the raster address decoder 47 is turned on when the raster values are 0 and 1. One screen shown in FIG. 6 is an even field. In this way, it becomes effective when the raster value is 0 in an even field, and when the raster value is 1 in an odd field.

(13) AND gate 46 is a copy secondary flip-flop 43
When three signals, the output of the raster address decoder 47, the output of the raster address decoder 47, and the DISPLAY signal indicating the valid display period are input at the same time, the write permission signal 48 is output as the product of these three signals.

This write permission signal 48 is input to the counter 42, and while the write permission signal 48 is input, the counter 42 increases by one in synchronization with the CRT display basic clock CHCP.
The count is incremented one by one and output to the copy buffer memory 18 via the address selector 50.

Then, the copy buffer memory 18 writes data to itself while monitoring the flow of data that is sequentially read out from the refresh memory 3 and inputted to the dot pattern generation circuit 4. In addition, this copy buffer memory 1
An output obtained by ANDing the CRT display basic clock CHCP signal and the write permission signal 48 by an AND gate 51 is input to 8.

In the example of Fig. 6, the screen is synthesized as shown in Fig. 7, so the refresh memory address MA becomes discontinuous from 5 to 61 in the middle (14), but the counter 4
The output of 2 remains continuous. In this way, during one screen from the vertical retrace signal to the next vertical retrace signal, the CR
It becomes possible to copy the contents of the refresh memory 3 being displayed at T to the cohering buffer 18 as continuous addresses. The time required to copy one screen to the copy buffer memory 18 using the screen copy control device 14 of this embodiment is C.
If the RT vertical synchronization signal is 60 hertz, it is 1/60 second.

In the example of the screen copy control device shown in FIG. 5, the counter 42]-address selector 5 for microcomputer
2 is selected by the address selector 50 and input into the backup memory 18 for copying.
The data on the RTCRT display screen is transferred to the address register 52.
can be written to the copy buffer 18 by CR
It also has a data printing function independent of the T display15).

According to this embodiment, the flow of CRT screen display data being transferred from the refresh memory 3 to the dot pattern generation circuit 4 is stored in the copy buffer memory 18 screen by screen by the screen copy control device 14. In order to perform a sivert copy by transferring the generated data to the dot printer 7 through the dot pattern generation circuit 6 during the effective display period of the CRT, the contents of the refresh memory are updated even during the dot copy. The CI'LT screen can be updated arbitrarily. In addition, the screen display data can be transferred to the copy backup memory 18 at high speed at about the same time as the screen display data flows, which reduces the burden on the microcomputer in note copy processing. The hard copy processing time can be shortened, and the microcomputer 1 can quickly execute new processing such as screen updating without being limited by the hard copy processing time. Therefore, the responsiveness to the central processing unit (16) of terminal devices such as CRTs and hard copy devices can be significantly improved.

〔Effect of the invention〕

As described above, according to the hard copy device for CR and T display screens of the present invention, the flow of CRT screen display data is stored at high speed in the copying panther memory by the screen copy control device, and the stored data is transferred to the dot printer. By transferring the data and making a hard copy, data can be transferred from the refresh memory to the copying panther memory at high speed, and the CRT screen can be updated quickly even during hard copying. .

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a conventional hard copy device with a CRT display screen, Fig. 2 is a block diagram showing another example of a conventional hard copy device with a CRT display screen, and Fig. 3 is a block diagram showing an example of a conventional hard copy device with a CRT display screen.
FIG. 4 is a block diagram showing yet another example of a hard copy device with a T display screen. FIG. 4 is a block diagram showing an embodiment of a hard copy device with a CRT display screen. FIG. 5 is a block diagram showing the screen shown in FIG. A block diagram showing a detailed example of the copy control device, FIG. 6 is a chart showing the timing of writing data from the refresh memory to the copy buffer memory shown in FIG. 5 (17), and FIG. 7 is a refresh FIG. 3 is an explanatory diagram showing a state in which a screen is synthesized using a part of data in a memory. DESCRIPTION OF SYMBOLS 1... Microcomputer, 2... CRT control circuit, 3... Refresh memory, 4... Dot pattern generation circuit, 7... Dot printer, 14... Screen copy control device, 18... Copy buffer memory, 41...Copy-next flip-flop, 42...
Counter, 43...Copy secondary flip-flop, 4
6.51...AND gate, 47...Rask address decoder. (18) $1 Eye 2 Eye J ¥3 Eye 4 Eye 6 Figure 7

Claims (1)

[Claims] 1゜Microcomputer is refresh memory
The data within the line is read out and inputted into a dot pattern generation circuit, and the pixel-developed data is displayed on a raster scan type CRT by the dot pattern generation circuit, and the pixel-developed data is transferred to a dot printer. A hard copy device for a CRT display screen that performs hard copying is provided with a backup memory for copying and a screen copy control circuit, and the screen copy control circuit performs the following operations during one frame from one vertical synchronizing signal to the next vertical synchronizing signal.
The data flow for one screen read from the refresh memory is stored in a copy buffer memory in real time, and the data once stored in the copy buffer memory is transferred to a dot printer according to the printing speed to make a hard copy. A hard copy device with a CRT display screen, characterized by: 2. During the horizontal or vertical retrace period of the CRT display, which is not an effective display period, the data stored in the copy buffer memory is sent to the dot pattern generation circuit, and the pixel-expanded data is transferred to the dot printer. 2. A hard copy device for a CRT display screen according to claim 1, which performs hard copying. 3. The screen control circuit has a first flip 7 set by a copy set signal from the microcomputer.
0 block, a second 7 lip-flop which is set by the set output of the first 7-lip 70-tub and the vertical synchronizing signal of the CRT, and a copy buffer memory which is cleared to its initial value by the copy set signal from the microcomputer. , a rusk address decoder that outputs only when the rusk address signal of a specific CRT is received, and the output of this rusk address decoder, a second 7
A first AND gate that multiplies the set signal of the lip-flop and the display signal indicating that the CRT is in a valid display period and outputs a write permission signal to the counter; 2. A hard copy apparatus for a CRT display screen according to claim 1, further comprising a second AND gate which receives the CRT basic display clock and sends the CRT basic display clock to a buffer memory for copying.