JP2000122030A - Method for driving matrix type liquid crystal display panel and device for executing this method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to convert the data of a vertical stripe array type liquid crystal display panel to the data for a delta pixel array liquid crystal display panel. SOLUTION: This device includes a signal generating source 1 for liquid crystals which generates the signal data for the vertical stripe pixel array type liquid crystal display panel and the delta pixel array liquid crystal display panel 5. Further, the device includes a signal processing circuit which executes the deta processing to impress the signal data to be impressed to the pixels of one line of the vertical stripe pixel array liquid crystal display panel supplied from this signal generating source 1 for liquid crystals to the pixels of the two lines of the delta pixel array liquid crystal display panel 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a matrix type liquid crystal display panel and an apparatus for implementing the method, and more particularly, to a matrix type liquid crystal display panel for converting data of a vertical stripe type liquid crystal display panel for a delta type liquid crystal display panel. The present invention relates to a liquid crystal display panel driving method and an apparatus for implementing the method.

[0002]

2. Description of the Related Art A conventional example will be described with reference to FIG. In the matrix type liquid crystal display panel driving device, the liquid crystal display format in which the RGB signal data supplied from the signal generation source is output as one bundle for the vertical stripe on the actual liquid crystal display screen is shown in FIG. (A). When the data for liquid crystal display in the vertical stripe arrangement is developed into the RGB data for liquid crystal display in the delta arrangement,
As shown in FIG. 4B, the liquid crystal display screen is horizontally long.

[0003]

As described above, the signal form output from a liquid crystal signal generation source currently in practical use today is a vertical stripe arrangement, and the RG output in one bundle is output.
If the B signal data is directly expanded into RGB data for a delta pixel array liquid crystal display panel, the liquid crystal display screen becomes horizontally long.

According to the present invention, there is provided a method of driving a matrix type liquid crystal display panel which solves the above-mentioned problem by adopting a configuration in which liquid crystal display RGB data of a vertical stripe arrangement is developed into two lines of a delta pixel array liquid crystal display panel. It is intended to provide a device for carrying out.

[0005]

A matrix type liquid crystal for driving a delta pixel array liquid crystal display panel by converting signal data for a vertical stripe pixel array liquid crystal display panel into RGB data for a delta pixel array liquid crystal display panel. A display panel driving method was configured. And Claim 2: Claim 1
In the method for driving a matrix-type liquid crystal display panel described in (1), the driving method comprises driving the matrix-type liquid crystal display panel over two lines.

In a third aspect of the present invention, the signal data is applied to four pixels of RGBR, GBRG, or BRGB of the delta pixel array liquid crystal display panel. A matrix liquid crystal display panel driving method characterized by performing data processing is constituted. Here, claim 4: a liquid crystal signal generation source 1 for generating signal data for a vertical stripe pixel array liquid crystal display panel, a delta pixel array liquid crystal display panel 5 provided, and supplied from the liquid crystal signal generation source 1. And a signal processing circuit for performing data processing for applying signal data to be applied to the pixels of one line of the vertical stripe pixel array liquid crystal display panel to the pixels of two lines of the delta pixel array liquid crystal display panel 5. A matrix type liquid crystal display panel driving device was constructed.

According to a fifth aspect of the present invention, in the matrix type liquid crystal display panel driving device, the signals should be applied to the three RGB pixels of the vertical stripe pixel array liquid crystal display panel supplied from the liquid crystal signal generation source 1. A matrix type liquid crystal display panel driving device for performing data processing in which one bundle of signal data is applied to four pixels of RGBR, GBRG, or BRGB of a delta pixel array liquid crystal display panel is configured.

[0008] Claim 6: Claims 4 and 5
In the matrix type liquid crystal display panel driving device described in any one of the above, the signal processing circuit comprises a first line memory 31 and a second line memory for storing signal data supplied from the liquid crystal signal generation source 1. 32 line memories, a line memory control unit 2 for performing pipeline control of write / read control of the two line memories, and a delta pixel array liquid crystal display panel 5 which receives read signal data of the two line memories and inputs the read signal data. A matrix type liquid crystal display panel driving device comprising a data synchronization output section 4 for synchronously outputting data is constructed.

[0009]

An embodiment of the present invention will be described with reference to FIG. One bundle of vertical stripe array RGB data DATA output from the liquid crystal signal generation source is allocated as shown in FIG. 1A when displayed on a liquid crystal display panel having a vertical stripe pixel array. When displaying the vertical stripe arrangement RGB data DATA originally allocated as described above on a liquid crystal display panel having a delta pixel arrangement, R lines are divided into two lines as shown in FIG.
The GB signal data DATA is developed and assigned, and the screen is displayed. In FIG. 1, the RGB of the vertical stripe pixel array liquid crystal display panel supplied from the liquid crystal signal generation source 1 is shown.
One bundle of signal data to be applied to three pixels is shown in FIG.
As shown in (b), the data processing applied to the four pixels of RGBR over two lines of the delta pixel array liquid crystal display panel 5 is performed. Here, the same applies to the case where data processing applied to four pixels of GBRG or four pixels of BRGB is performed.

Further, the vertical stripe array RGB signal data DATA is converted into 4 dots (R, G, B, R) of a delta pixel array.
), The aspect ratio of the screen, that is, the aspect ratio can be maintained. An embodiment of the present invention will be specifically described with reference to FIG. Reference numeral 1 denotes a liquid crystal signal generation source, which outputs a liquid crystal control signal including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a dot clock signal DOTCLK, and a vertical stripe arrangement RGB signal data DATA.

Reference numeral 2 denotes a line memory control unit which has two line memories, a first line memory 31 and a second line memory 32, and controls both of them in a pipeline. That is, the writing of the RGB signal data DATA output from the liquid crystal signal generation source 1 and the previously written RGB signal data
The reading of the B data DATA is performed in parallel. Then, the first line memory 31 and the second line memory 32
Are composed of a total of three memories, an R memory, a G memory, and a B memory. In addition, pipeline control is
Controls by giving multiple instructions to the data in a continuous data stream, overlapping each stage of instruction execution,
This is a processing method that speeds up all processing by performing parallel processing.

The write WRITE control for the first line memory 31 and the second line memory 32 will be described. The write WRITE control is performed based on the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the dot clock signal DOTCLK output from the liquid crystal signal generation source 1. The first line memory 31 and the second line memory 32 are reset based on the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync, based on whether the first line memory 31 to be written next is the first line memory 31 or the second line memory. Check if the line memory 32 is
The reset signal RS of the write-side line memory is enabled.

The writing of the RGB signal data DATA
After the reset of the line memory is completed, the write enable terminal WE is enabled in accordance with the display enable period of the liquid crystal signal generation source 1, and R
The writing of the GB signal data DATA is performed. At this time, the R data is written to the specified address of the R memory,
The G data is written to a specified address of the G memory, and the B data is written to a specified address of the B memory.

In order to explain the read READ control of the first line memory 31 and the second line memory 32, the line memory for performing the next read based on the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync is the first line memory. It is checked whether the memory is the memory 31 or the second line memory 32, and the read enable terminal RE of the read-side line memory is enabled. At this time, it is recognized where the currently read data DATA is displayed on the liquid crystal display panel having the delta pixel array, and the address thereof and the read enable terminal RE of the R memory, the G memory, and the B memory are set. Enable. FIG.
When the third dot from the left end of the first row of the delta pixel array liquid crystal display panel 5 is displayed from the line memory 31 or 32, the read enable terminal RE of the memory for B is enabled at the address *** 1. To

Reference numeral 4 denotes a data synchronization output unit. Vertical sync signal Vsync and horizontal sync signal Hs corresponding to the display enable of the delta array liquid crystal display panel and other standards
Sync, dot clock signal DOTCLK, and RGB signal data DATA are synchronously output to the delta array liquid crystal display panel 5.

[0016]

As described above, according to the present invention, the vertical stripe array RGB signal data DATA output from the liquid crystal signal generation source is developed into two lines of the delta pixel array liquid crystal display panel. Thereby, what should be displayed on the landscape display screen in the past can be displayed with the original aspect ratio.

[Brief description of the drawings]

FIG. 1 illustrates an embodiment.

FIG. 2 is a block diagram specifically illustrating an embodiment;

FIG. 3 is a diagram illustrating signal assignment.

FIG. 4 is a diagram illustrating a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Liquid crystal signal generation source 2 Line memory control unit 31 First line memory 32 Second line memory 4 Data synchronization output unit 5 Delta pixel array liquid crystal display panel

Claims (6)

[Claims] 1. A method for converting signal data for a vertical stripe pixel array liquid crystal display panel into RGB for a delta pixel array liquid crystal display panel.
A method for driving a matrix-type liquid crystal display panel, comprising: converting data into data to drive a delta pixel array liquid crystal display panel. 2. The method of driving a matrix-type liquid crystal display panel according to claim 1, wherein the driving is performed over two lines. 3. The method of driving a matrix-type liquid crystal display panel according to claim 2, wherein the signal data is converted into RGB data of a delta pixel array liquid crystal display panel.
A method of driving a matrix-type liquid crystal display panel, comprising: performing data processing applied to four pixels of R, GBRG, or BRGB. 4. A vertical stripe pixel array comprising a liquid crystal signal generation source for generating signal data for a liquid crystal display panel, comprising a delta pixel array liquid crystal display panel, and a vertical stripe pixel array supplied from the liquid crystal signal generation source. A matrix comprising a signal processing circuit for performing data processing for applying signal data to be applied to pixels of one line of a liquid crystal display panel to pixels of two lines of a delta pixel array liquid crystal display panel. Type liquid crystal display panel drive. 5. The matrix type liquid crystal display panel driving device according to claim 4, wherein one bundle of signal data to be applied to three RGB pixels of a vertical stripe pixel array liquid crystal display panel supplied from a liquid crystal signal generation source. The delta pixel array liquid crystal display panel RGB
A matrix-type liquid crystal display panel driving device, which performs data processing applied to four pixels of R, GBRG, or BRGB. 6. The matrix type liquid crystal display panel driving device according to claim 4, wherein the signal processing circuit stores the signal data supplied from the liquid crystal signal generation source. And two line memories of a line memory and a second line memory, a line memory control unit that performs pipeline control of write / read control of the two line memories, and read signal data of the two line memories. A matrix type liquid crystal display panel driving device, comprising a data synchronization output section 4 for synchronously outputting to a delta pixel array liquid crystal display panel.