JPS5965368A - マルチプロセツサ− - Google Patents
マルチプロセツサ−Info
- Publication number
- JPS5965368A JPS5965368A JP57175724A JP17572482A JPS5965368A JP S5965368 A JPS5965368 A JP S5965368A JP 57175724 A JP57175724 A JP 57175724A JP 17572482 A JP17572482 A JP 17572482A JP S5965368 A JPS5965368 A JP S5965368A
- Authority
- JP
- Japan
- Prior art keywords
- processors
- processor
- main
- common bus
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57175724A JPS5965368A (ja) | 1982-10-06 | 1982-10-06 | マルチプロセツサ− |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57175724A JPS5965368A (ja) | 1982-10-06 | 1982-10-06 | マルチプロセツサ− |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5965368A true JPS5965368A (ja) | 1984-04-13 |
JPS644221B2 JPS644221B2 (enrdf_load_stackoverflow) | 1989-01-25 |
Family
ID=16001123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57175724A Granted JPS5965368A (ja) | 1982-10-06 | 1982-10-06 | マルチプロセツサ− |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5965368A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0721106A (ja) * | 1993-06-30 | 1995-01-24 | Nec Corp | ネットワーク管理方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5559520A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Output switching system for processor duplication system |
JPS58205273A (ja) * | 1982-05-26 | 1983-11-30 | Hitachi Ltd | 多重化システム |
-
1982
- 1982-10-06 JP JP57175724A patent/JPS5965368A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5559520A (en) * | 1978-10-27 | 1980-05-06 | Hitachi Ltd | Output switching system for processor duplication system |
JPS58205273A (ja) * | 1982-05-26 | 1983-11-30 | Hitachi Ltd | 多重化システム |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0721106A (ja) * | 1993-06-30 | 1995-01-24 | Nec Corp | ネットワーク管理方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS644221B2 (enrdf_load_stackoverflow) | 1989-01-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0528538B1 (en) | Mirrored memory multi processor system | |
US4684885A (en) | Arrangement for on-line diagnostic testing of an off-line standby processor in a duplicated processor configuration | |
JPS5935057B2 (ja) | マルチ構成可能なモジユ−ル処理装置 | |
JPH0683660A (ja) | モジュール化プロセッサ・システム | |
US5452462A (en) | Global communication interrupt control system for communication between real and virtual machine systems using global communication functions of a shared memory | |
EP1380951A1 (en) | Fault tolerant information processing apparatus | |
JPS5965368A (ja) | マルチプロセツサ− | |
LALA | Advanced information processing system | |
JP7512529B2 (ja) | データ処理のためのデータ処理ネットワーク | |
JP2774675B2 (ja) | バスコントローラ | |
JPH0736720A (ja) | 二重化コンピュータ装置 | |
JPS589460B2 (ja) | 複合デ−タ処理ユニツト・デ−タ処理装置 | |
JPH0318958A (ja) | マルチプロセッサシステム | |
JPS5911455A (ja) | 中央演算処理装置の冗長システム | |
JP2985188B2 (ja) | 二重化計算機システム | |
JPS6337420B2 (enrdf_load_stackoverflow) | ||
JPH0126096B2 (enrdf_load_stackoverflow) | ||
JPH03163657A (ja) | マルチプロセッサシステム | |
JPH11327941A (ja) | 二重化計算機システム | |
JPH06242859A (ja) | 二重化プロセッサ装置 | |
JPH0283630A (ja) | 汎用処理システム診断方式 | |
JPS59172062A (ja) | 同期処理方式 | |
JPH05204873A (ja) | 分散型処理システムにおける処理装置間通信処理方法 | |
JPS59218533A (ja) | 共通バス転送制御方式 | |
JPS61100036A (ja) | 2重化システムデ−タ受信処理方式 |