JPS5956758U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5956758U
JPS5956758U JP15285382U JP15285382U JPS5956758U JP S5956758 U JPS5956758 U JP S5956758U JP 15285382 U JP15285382 U JP 15285382U JP 15285382 U JP15285382 U JP 15285382U JP S5956758 U JPS5956758 U JP S5956758U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
semiconductor device
case
pellet
electrode part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15285382U
Other languages
Japanese (ja)
Inventor
本間 一夫
梶村 武史
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP15285382U priority Critical patent/JPS5956758U/en
Publication of JPS5956758U publication Critical patent/JPS5956758U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来型半導体素子の斜視図、第2図は゛その上
面図である。第3図は従来型半導体素子の横断面図、第
4図は本考案による一実施例の斜視図、第5図はその上
面図、第6図は本考案によや半導体装置の他の実施例の
斜視図である。 1:低抵抗半導体基板(サブストレート層)、2:釡属
電極部、3:ケースめ絶縁体部、4:ケースの金属部、
5:金属線あるいは金属テープ、6:動作層、7:金属
板。
FIG. 1 is a perspective view of a conventional semiconductor device, and FIG. 2 is a top view thereof. 3 is a cross-sectional view of a conventional semiconductor device, FIG. 4 is a perspective view of an embodiment of the present invention, FIG. 5 is a top view thereof, and FIG. 6 is another embodiment of a semiconductor device according to the present invention. FIG. 2 is a perspective view of an example. 1: Low resistance semiconductor substrate (substrate layer), 2: Metal electrode part, 3: Case insulator part, 4: Metal part of the case,
5: Metal wire or metal tape, 6: Operating layer, 7: Metal plate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板上に複数の動作層および電極部を有するペレ
ットと、ペレットが実装されるケースからなる半導体装
置において、前記金属電極部近傍においては幅が狭く、
それ以外の部分では、広くなるように加工された1枚の
金属板を用いて前記電極部とケースとが接続されている
ことを特徴とする半導体装置。
In a semiconductor device comprising a pellet having a plurality of active layers and electrode parts on a semiconductor substrate, and a case in which the pellet is mounted, the width is narrow near the metal electrode part;
A semiconductor device characterized in that, in other parts, the electrode part and the case are connected using a single metal plate processed to be wider.
JP15285382U 1982-10-08 1982-10-08 semiconductor equipment Pending JPS5956758U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15285382U JPS5956758U (en) 1982-10-08 1982-10-08 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15285382U JPS5956758U (en) 1982-10-08 1982-10-08 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS5956758U true JPS5956758U (en) 1984-04-13

Family

ID=30338339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15285382U Pending JPS5956758U (en) 1982-10-08 1982-10-08 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5956758U (en)

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