JPS5954349A - Data transmitting system - Google Patents

Abstract

PURPOSE:To use a power supply line as a power supply line and an address line, by providing a transmitting means superimposing a designated address data output on a power line based on a terminal data request signal and transmitting it to a terminal side, to a central side; and superimposing an address data output on the power supply line. CONSTITUTION:A terminal device 2 is connected to a master set 1 at the central side controlling a temperature or the like of a building, and a power and address line l1, a common line l2 and an observed data line l3 are connected between both devices. In case of monitoring, addresses A7, A0 are set to input terminals I7-I0, and when an observed data request signal button of the master set 1 is depressed, an observed data request signal I is applied to a clock synchronism circuit 4 and an output is applied from the circuit 4 to a shift register 6 at the trailing of an output phi of a clock generator 3. Further, address data A7-A0 are outputted to a long/short signal converting circuit 7 based on the signal phi and the output is applied to an address data power supply superimposing circuit 8.

Description

[Detailed description of the invention] This article 9G relates to a data transmission system.

In the conventional data transmission method, from the center side to 'terminal +1
Send the specified address command to +lI based on the DAM tree data request signal.1. l'ii2: 4F4 was determined by this address command from the end ll111. The statue of Seki □
end i°'
J4 transmission method ÷ Nato, it is configured so that it is sent to the center (Hll) and the monitor is turned on on the medium heat side, and moreover, from the center 1i1i to the terminal 111i via 1 residential #jun, Is there something that is supplied with a source?

In the data transmission system of this type, the central fil+
Address line (address err) 1% from the terminal side to the center, which supplies address data to the end, end fil+head, finger 51. based on the address command. : Data line that sends data to the terminal device (data line)
and an illumination Bp4, respectively.
,.

However, let's do it like this, Chuo 11! The number of wires connecting l and the node to the end side is large, and the thickness of the cable is also thick, so the distance i4i connecting the middle 2io<+ and the terminal side is long. It was connected to Kost City. Also, the valley terminal R on the terminal side; t6i scrap 111
Since the j and the medium heat side are connected in parallel, there are a lot of shrines.

The amount of construction work was so expensive that the construction costs were even more costly.

The present invention has been made to solve these conventional problems, that is, the central 11! Power is supplied from +1 to the terminal side via a power line, and at the same time when the central side sends an address command specified by the terminal data request signal to the terminal 1i111, the terminal side also sends the specified address command to the terminal 1i111 by this address command. In a take transmission method in which information data from one of a number of terminal devices is transmitted to the central side, the central side receives the specified address data output based on the terminal data number. The above Jc:
The present invention aims to provide a data transmission method characterized by superimposing the address data output on the i6N pure signal and converting the open sound, j', IJ into (); 2 and address pure. ? The present invention will be explained using a J, J boundary data transmission method for controlling E411-, humidity, etc. as an embodiment.

Fig. 1 is a block circuit diagram showing an embodiment of the third border data transmission method using the present invention, and Fig. 2 is a terminal i of Fig. 1.
It is a block circuit diagram of the terminal handset of i1.

In these Figures 1 and 2, (11 is the parent JJ on the central side that controls the temperature and humidity of the hill, 4
, +21 is one terminal connected to the central fullllll master unit (11), and in this terminal 11111t21,
, each terminal child squid on the terminal side (2) ((2i(+-1, 2
,......n)), source and address lines (゛power and address #) l+, common lines e2 and ? The m-measurement inputs 15 are respectively II; I
jll +),, I'm in the middle of the day, and I'm in the middle of the day! It's base unit (1) terminal IHII +21 is tit, groan and address line l++ common line 12 and a, r
The first one is coupled by one data line 13.

(31 is a clock generator that sends out a lock signal φ as shown in FIG. 6(a), (The wing is a clock generator as shown in FIG. (This is a clock synchronous circuit that receives the clock signal φ♂ of S() and sends out outputs o1 and 02 at a predetermined timing. This clock synchronous circuit (4) is shown in FIG. 6 (1))
When the signal r#+j measurement data is supplied, the output 01 at the ``L'' level is output at the falling edge of the next clock φ (=φ.) as shown in FIG. 6(d). (logical °"O°" output), and furthermore, at the rising edge of the 81st clock φ (-φ.) counting from the down clock φ (=φ1),
As shown in 610(C), the output 02 is configured to be sent as a command to the address data switch SW.

(5) is a parallel-to-serial conversion circuit that converts a parallel signal into a serial signal.The configuration of this parallel-to-serial conversion circuit (5) will be described as follows. (6) is 8 bits
The input end D7 of the most advanced register is grounded through a resistor 1(,7), and the input ends of each of the other registers are connected to a resistor I(,6). It is connected to tgs+vc via ~几0. Also, each of the eight registers is connected to the address take setting terminal ■o~ via the address take switch IW, ) (actual switch).
I7 has r~ or 7th 7th. Here, the shift register ((il j) is the output 0 of the clock synchronization circuit (4).
("J," level) is supplied before 11, that is, the output is 0. When the shift register (6) is at the 'H' level, the shift register (6) does not shift even if the shift clock signal φ from the clock generator (3) is supplied, and the output 01 goes to the J, TI level. Then, a shift operation is performed by the shift clock signal φ.Furthermore, when the address data switch (SW, ) is set to ON, the shift register (6) has the take of JJ7 to JJ (corresponding to the group code shown in FIG. 6(e)). ) is stored, and the address take switch (SW, ) is turned on to take the addresses and take A7 to A set to the address data ml constant terminals (7) to (1,).

is input to the valley register of the shift register (6).

(7) is a long/short signal duplex circuit, which is a parallel-to-series variable circuit (4 to 4) (output circuit of DJ path (5), that is, shift register (6)).
Garanaka, provide 8K 3 Ill (e) address data output as shown in DC city 1 area. I am exempt from the first issue. (8) is an address take/short circuit for superimposing the address data output converted into long/short signals in the long/short signal conversion circuit (7) on the 1fAL power supply.
6f, df j [signal: circuit, this address take fjj, the output of the circuit () is ;'ij
rM! By adding ζ address line to j4j 4+
f% (S' through If and address line 11:
jj last 1111 +21 each 1': A'i youngest child I≧(
21) to (2n).

Here, the terminal handset (2□(i=1.2.
...song...n))) 791 is '(q, lI:)i and address line 1 using Yang 2 diagram below.
The output of the address data/power supply superimposing circuit (8) supplied through 1 is [11; Are you planning to send it? This is a substitute IU circuit. 1101
is the address data output, which is supplied from the circuit 18) with the address data, power supply type, and ν", divided by j and t.
There are 10 circuits for the address signal output 1, which consists of a capacitor 0 and a resistor lt. (The mark is a waveform shaping circuit that shapes the waveform of the address signal separated by the address I8° tangent 1'1lli circuit. ) into a signal of “O°゛” 4
I7! circuit, and this inverse conversion circuit (12) is after fm
81) Send a shift pulse and a converted address data output to the IT-configured shift register (13). Shift] register (13) sequentially reverses the inversion circuit □path 02
) is sequentially shifted based on the shift pulse. (14) is an 8-counter that divides the shift pulse that is the output of the back circuit ([2)] into 1 number pulse, and the counting pulse is 81.
1 + After counting, the believer outputs a signal (output ``HII level (commercial full head address data signal initial code (1) 7~Do) 5-static: Separate (``q code h11 (
Separate stroke [1'#: de・←), this bright sign 11 Asabetsu [0
At 1113flip+, the contents of the valley register in shift register (13) are cooled. code h) & another path (
lli) is an inverter (171) and an AND circuit (Iil+
It consists of The output of the head and sleeve identification circuit flf;l, that is, the output of the AND circuit (18), is 11. -S flip-flop circuit +1! (1, reset terminal 1?, and 8; Iji) is supplied to the reset terminal of the counter (1?).

tztrr is a tres setting switch that sets the address of the corresponding terminal, and switches from switch F'S7 to 5o1.
One end is connected to the 1 source + o.・・・・・・
If you turn on song 7), ``U'' will be set, and if you turn it off, ``1'' will be set. (21) is the address, and it is suspected that it is the setting address of the armpit terminal I≦''mo set with the address setting switch 发)) in the separate circuit of IIG.
The shift register (1, "() softens the address data signal that is being raised and changes the address data signal."'
It sends out an output of II''' level (n = 1°). This address identification circuit (21) consists of an exclusive OR circuit +7;jl~f'L!!+1 and a NOR circuit (3 (
1) (!: Consisting of the output of the AND circuit (15)
The output power of the AND circuit (15) is supplied to the first child S.
When ``1/H/L/ (66 ri゛1''), R-8 flip o shift (1!I) 0) flj Output from blade end Q ``1 level power output off, terminal based on ko off There is a switch (8w2) installed in the handset 21 for IE data transmission.
) to the center (QIJ parent (11) to the corresponding terminal i...+
Observation data of (2i) is f measured data line/, 5i
- Transmitted via 7th.

C1,) is the environmental data 4 sensor circuit, and the detection sensor includes a temperature sensor and a humidity sensor, but it depends on whether the assigned take detection of Iku Mizusueko (2r) is an example. Predetermined sensor -it selection (i 7
j-1. This is a buy-border data detection sensor (circuit).
3+1 is inside the hill.

I'7''jl)' Even if it's a tall 'hill's progress,'
) r , 1' , the humidity is output in both directions. Here, each terminal 4p (2i (i = 1.2.
・n)) is a multi-point 17A I, t, i, 'n in the hill:
It is assumed that which one of If, etc. is in charge is detected, and each address is set according to If. (3
21 is the environmental data that the terminal (no 21) is in charge of, for example, the warm data ('
1F+- pressure signal) to the corresponding constant current 15ft. Constant th: Flow circuit, ff, (:l is 1. Cursed current control detection resistor, and this resistor (:(:a) conversion circuit (32
) corresponding to the detected data from 'tj((At,) flows, the terminal voltage of this resistor 0;
21 performs feedback detection to control the desired constant flow so that it is sieved, and sends it to the middle fire 1i11 using a current transmission method to transmit a constant flow force corresponding to the detected data.

Next, in FIG. 1, C(4) is the center ill, □
+81, set within the current data 4 (σ
The detection data (observation data) from the fourth selected y:r4 youngest child t% (2i) (based on the address command) flows through the cheetah line 15 to the center [1!I]. Transmission method: 1, 1, +
A constant current corresponding to the detection data flows through the current data detection resistor (S+1) (3.D).The current take (detection data) is converted into a voltage take by the detection resistor (-). 35]. t3til is input to the buffer ``111 i%r (1.
/ I) inducing γiii a abbreviated) camellia) to 1 (!
: Cane t1; 1 positive circuit. (I) 0 is A
/ D conversion number 71 digital signal change i) i SAji, output is 1 (1, supplied), and the corresponding Ql'1. 1
The open side take of the youngest child tl, +S is shown in the seventh position.

J,) Il applying the present invention to the formation of soil f, ~゛C
l 4i;t About jti11 works of data transmission methodJ
I will explain below.

On the center side, in the building fli control (j
4 degrees!・The J platform that requests and monitors the output data (I and 11 data) such as 1. and input terminals (Y7) to (io) +
Set this address identification circuit〇, and then press the parent side's side data request <, +ζ:Shi n and press Il +.
! y, i'tll take:4. v5-1g-No.1 (4th).

61 ゛ direct 1))) is supplied to the clock circuit (circuit (4)). (=φ.

), outputs ○, ("J," level) from the "clock dot sum" circuit (4) to the shift register (6) are both M, and the shift clock φ causes vHf (f) as shown in FIG. No. D7 to Do are 1・:((774Irf1
There are 9 columns. The clock synchronization circuit (/1) has a distance of 3.
l*l (at (c) As shown in (d), the 8th clock φ(-φ1) counting from the next clock φ(-φ1)
At the rising edge of φ, 1), the output 0. (
``1F level) and output 02('')f
” level) turns on the address setting switch (SW, ). This turns on the shift register (7.1..70.'l of one point (a certain place l in the old hill)) or humidity 1i.
1: The address of the set terminal 1e related to etc.
7) ~(]0) is set χi4sai'also address) is
12 Column i, enter the center. and shift clock i 4
Addresses A7 to Ao are also output to the sub-register 1 (7), that is, from the shift register (6); [ ,・J
'+ 3 In Figure (7), 1) and a are shown, and the output of the address data is 1°.

Convert it to n O++ or long/short digits and take the address '[digits supplied to Hifu M muscle circuit (8), II A]. Allesnak City'? C;・l (Tatami circuit (8) is 6r,
By superimposing one address take output converted into the long and short (F\) number, the electric current (via 1"A and the address line t)'RA end side valley ψ, ゛IA end child (Nj (2I (i =
1.2. ...-, )). Each repair end child machine (2i (
In i-1, 2, . . . n)), positive 1) ζ1 is taken out via a constant voltage circuit 19). That is, from the center to each end, (111.
That means that.

On the other hand, the address signal molecule f is addressed by the fffi circuit f101 through the waveform shaping circuit 1 and the inverse conversion circuit 1+ :<ll;:;+'l:
be done. This inverse conversion circuit (12 is used to output long and short signals of address-j-events).
't' :) I'm hungry for H. From the inverse conversion circuit (12), shift register II:<+hair address take (i number and shift pulse are 11+l'G, and the shift register (13) becomes address take:: (it< Figure 3(e)
Initial code shown in lJ7~D, address day/JA7~
Ao) will be stored by .(i1st shift).

8A e-counter fL (I counts 8 as a shift pulse l-iil number pulse from the reverse circuit (12) with l, and the M raise output is output to circuit (15) 1-J'C+
It will be T'8. - force, /- throat register +131 [1 mark +31) 7~1. ). has been softened, and the content of this shift pass (31st content is supplied to the head code identification circuit 11i1.J)7~Do is shown in FIG.
As shown in el, it is 01...1, so W44
The output of the number identification circuit (13) becomes "1", and this "1" resets the 8.1-inch counter (14).

The address setting switch f2f11 is the address setting switch f2f11.
θ constant address digital switch n″j, r
, r' is 11. In this case, addresses that match the @setup address are excluded, so the address identification circuit (21) does not send out the "°1°" output. Next, when the 87 river counter 04) counts 8 while the above-mentioned reset 1 instruction is applied to the 8 J- counter (14+), the shift register (1: (+ takes the address of 87 to Ao or jfL: j', LY, and fi te.Then, the output of the corresponding Mizusuezi address identification circuit (21) from the central 1jiil is U''Lm', and the AND circuit (fifth) is an R-S flip-flop circuit. tl!l's set terminal S IC"O"far'db
Time output W) HQ 11 is still at °゛0'' and the switch (Sw, ) is not main.

However, if the address data A7 to Ao match the address assigned to the corresponding terminal 4 (2j), the matching output ("1") of the address identification circuit (21) will be displayed.
) or the AND circuit (the other input ψ; 1,) which is supplied to the AND circuit Q51 (O octal counter ((4) to (
Since the 1s rising signal is supplied, the R-87 lip flop circuit 0! Jl is set by the 1" output of the AND circuit 115), a 1" output is sent from the output terminal Q, and the switch (SW2) is turned on. Then #′! Detected by the pupil data detection sensor circuit 01), the detection data (detection data such as temperature change or humidity at a certain location P that has been set in advance for the terminal handset) is fixed. It is supplied as foot current information to the central side via the observation data line e3 via the switching circuit t32 using the current transmission method. Here, since no latch circuit is provided in the data detection 1+111, if the observed data changes, the current information also changes accordingly. Whether or not to provide another circuit is determined as necessary. On the center side, terminal ll
The skewer fed from 1U, the flow rate yi (?glare force j °-ta) is t (the direct pressure @ due to the 1st flow temperature detection resistance (3t1)
- Hou Sa 11] Increase the amount of data ``1] Data is input to C (!il), and the data is displayed O, B via the rough line-in correction circuit (:1lil, A/D converter (7th)). In other words, the 4A?f+1+) data of the address (terminal slave) called in the ffl+lI of the middle *bait will be displayed as the first digit. If the detected data is necessary, use a digital switch to connect the input terminals (■7) to (
1,) at a predetermined timing, and the primary address data is sent to 11.
The output 0. of the clock synchronization circuit (4) is shifted at the timing and sent out through the input signal.
.

Control 02 and 11ba2 (Yes. Then Ti1l-
In the same way, specify A and the address line 1': T, i, the youngest child, i, the deceased, and then move to the center. Is it possible?Here, the address data (if fixed, l) is extracted 1
Since the 111 youngest child's eye is latched, the force S1 data is not latched, so the data υ) changes are displayed time by time, and the terminal child's take change is already supervised by the central 111, and the 19th child in the hill is "Bo 1 life no Vj's C crystal IJ, L and ((j ga 1
1, 1, 1, etc. should be set to a non-returning value (41 to 1)
S low horse and saru.

In the present invention, address data is superimposed on the frost and source that are supplied from the center side to the terminal side of S'l'l' for 1ir. By using one address line and one tree, the number of cables is reduced by one compared to the conventional one. '#'ibu[)"IIDf#) is long roper,j (in this example, J(issue), continuous cable length is !-min, ba1k+y+, total cable extension distance is Takiege 21 (+n'+, inside) is extremely flexible and cheap.Also, because the number of legs connected to each 3□'hi terminal unit (21) in a cage has been reduced by one on the terminal side, it is only 9. 1 inertia is easy and the construction work ηt is saved by 1'.

In this embodiment described above, although the environmental data transmission method for controlling the temperature and humidity layer inside the building has been discussed, the misfire 11 is not limited to the central IH1.
1 to the terminal side >5t'Mt^^ opportunity specified address command, and data is transmitted from the terminal side to the central 1tllll, and moreover, terminal 11! I's ULRI is the data transmission method supplied from the central side.
It is also applied to Uki.

In the present invention, the means for superimposing the address data output specified based on the terminal data approval signal from the center 111 on the terminal 111X and sending it to the terminal side is as follows:
Limited to this example> [1sa A (without, tasae i, j
It can be applied as long as it uses a 4-way transmission system to JPA, or a self-cloaking system such as a phase encoding system or an IP SK system.

iN is supplied from the center 11t11 to the terminal side using the take transmission method l- according to the present invention described above;
)%< iN and address data are superimposed 'FIG,
As for the older sister and address line, it is necessary to set up the address data IJ with Ichiyu as usual (Mabetsu 11/old and address data IJ).
! 1. j,! 9. In particular, the length of the cable connecting the center side section 11 to the 4th section will be reduced by one.
It's so long! The cost is significantly lower). 1 - I1g + I 0) The decrease in tJ by 1 means that the number of units connected to each 1-piece device on the terminal side is the same as the number of units 11 to which the terminal is placed. This has an extremely large effect, making it easier and reducing construction costs.

[Brief explanation of drawings]

Gal 1 [N 1 is one of the J loading data transmission methods that apply the real or ζ light, 1', 1. Block circuit diagram showing i hS example, Ki 2
1:<l is a block circuit diagram of a preliminary terminal of the 1.1 end sea bream in FIG. In addition, in the Iada code used for 1 Zo 1 page, (11°
・・・・・・・・・・・・φiff end or 11(21(j
=j, 2. ...-...11)) °゛°°°゛°゛Terminal handset +71゛°゛=-=-゛Long/short signal conversion circuit)8)
・・・・・・・・・・・・ Address line・
Power supply superimposed M path (4, , , , , , , , , , , ,'
tK (ltij and address line 15, -=-=
- View, (rule Cheetah line. Agent Masaru Doyo)

Claims (1)

[Claims] (1) Power is supplied from the center to the terminal 1j111 via the power line, and the central side sends the specified address command to the terminal in response to the terminal data request signal. From the side. At, :,,terminal t with the number of litters specified in the command;! Information theta from 1 out of 4 instruments in 9th grade! Is there a way to send a message to a decoy? and the central side is connected to the power supply hole to output address data based on terminal data.
a transmission means for superimposing it on the 4i source line and sending it to the terminal fIII;
If you want to change the take direction method.