JPS59500436A - Electron beam/optical hybrid lithography resist method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Electron beam/optical/'v hybrid lithography resist method Background of the invention TECHNICAL FIELD The present invention relates generally to hybrid lithography methods and further relates to hybrid lithography methods. Physically (・Well, at the internal level /'1 hybrid electron beam / optical photolithography Phi (ρhot.

lithography) method.

In the semiconductor industry, optical lithography technology is used to form ζ patterns on semiconductor substrates. or on a thin layer of material on semiconductor substrates, PC boards and the like. Widely used to form patterns. In normal photophosphorography method , a photoresist layer is applied, and a portion of the photoresist layer is usually removed through a mask. 1) different dissolution of the exposed and unexposed areas by photoresist developer. speed (rate). The application of such a developer One of the exposed or unexposed portions is removed and a patterning mask is placed on the underlying layer 7. leave a thick layer. pattern formation futregis) = 'N'/i, then ettin mask, ion implantation mask, metal removal mask or the like Used as an analogy.

Optically exposing the 71-ton cyst layer through a mask is a long-standing method. In the t0 ultraviolet spectral range, the brightness peak is usually 1. Section Keisha (2-) This will increase exposure. Semiconductor board technology is progressing (two of them are sub-scale and small size). A need arises to generate patterns having a size or critical dimension. but, ) The size of the 10,000 resist pattern is reduced to 1-2 micrometers. With a trick to further reduce the size to the submigron range, optical technology C2 It is impossible to solve such a small size.

In view of the limitations imposed by optical techniques, the use of electron beam exposure of the photoresist layer A lot of work has been done. Electron beam exposure produces precise cross-sectional geometry The disadvantage is that it takes a very long time to expose large-sized bonds, since the outline of the shape is drawn in words. be.

Due to the nature of the resist material, all e-beam exposures are often , Bo resist material base 1, which requires a long exposure time to expose the large surface 7A. Or a monkey with a tancho as a negative resist. Unexposed resist from negative resist i-i 2 The part is now! It was removed during the East Pokotes. By positive resisting ('', the opposite is true It becomes a fruit, and only the unexposed part remains until after the first phenomenon. 1 Data on standard MO3 collector circuit When producing a 7< turn, such as a 7< turn, a precise geometric figure is required. 7J”, only a small part (sm/xlt proftzol) of the full length surface is covered. Just cut it down, use page resist and electron beam C2 1 J Achu 1. frame Beam, I need a high answer: I'll give you a few turns, but I'll give you a small part of 2 strokes and 5. If only the exposure is f''' - 1 degree, the electron beam of A is 1/distortion. Yo, General C21. w) Raising effect (, 5 layers w) for pattern sizes of microns or less Elm n! 1 tffect). Raised effect Geo, desired pattern defects Bring enough copies. Negative resists therefore generally high resolution? & Precise geometry of degrees It is not acceptable to use it for electron beam processing of mathematical figures. However, the correctness of this application In order to irradiate the resist, it takes a long time to expose a large area of the substrate. Requires light. Therefore, high throughput for manufacturing processes is This is ostensibly incompatible with the high resolution achievable with multi-level exposure.

Achieves high resolution obtained by electron beam exposure, and also achieves high throughput. Therefore, in order to maintain a manufacturable process with It is desirable to combine electron beam and optical phosphorography during the process. north, /%Although the use of ibrid technology has been disclosed, prior art a + is not completely satisfactory. There was no.

In one hybridization process, two layers of resist are used. 1st layer stripe , the electron beam is exposed to a precision /(turn, and the first nitching stage Run as a mask using Next, the second resist layer is coated with a second etching layer. Is it at the stage of development? The substrate is then optically exposed to pattern a large substrate area.

This intermediate layer) 1 Ibrido ° Buniseson, it is self-evident that it requires many extra tiers. The downsides are all over the place.

One disclosed method that accepts only a single layer of resist (4) In the process, a regular resist is used, but the electronic In the beam exposed area, the tone of the resist is reversed to negative from the pressure. The electron beam was overexposed to the extent that it was exposed. Optical processing and positive resist Proceed in the same regular manner. This process results in insufficient resolution, reduced registration have the disadvantages of high contrast and the need for increasingly higher and longer electron beam doses. are doing.

In order to overcome the problems inherent in such prior art processes, it is an object of the present invention to A hybrid sisographic process that combines electron beam and optical phosphorography The objective is to provide improvements to the

Yet another object of the invention is the use of positive resist materials, electron beam exposure and optical Vibration lithography maintains its positive tone for both optical and optical exposures. The goal is to provide process improvements.

A further object of the present invention is to provide a 6-high resolution system with precise geometric resolution and high throughput. It is an object of the present invention to provide an improvement in the bristle lithographic process.

It is a further object of the present invention to solve the problem of hybrid intermediate level e-beam/optical lithography. Changes to the Tsuku process 3. Served with sushi (nori).

A brief summary of inventions The foregoing objects and objects, as well as the advantages of the present invention, are directed toward single-beam and optical lithography. Combining Raffi is accomplished through a gripping Yamakai-level hybridization process.

The substrate on which the resist pattern is formed is compatible with both electron beam processing and optical processing. By applying an adhesion promoter (αctnesi.1pr...motor) that can Get ready. The positive 70,000 tresist is sensitive to both electron beam exposure and optical exposure. It is applied to a substrate and exposed to light. The precise geometry of the pattern is created using an electron beam. large areas without precise geometric features are exposed optically. high suru The possible process of printing is completed by a resist development step and 5, leaving a resist deposit layer with precise geometric features intact.

Brief description of the drawing A single drawing can be patterned into a precise brick pattern array according to the present invention. A typical synthetic mask is shown below.

Detailed explanation of preferred examples In the following description, inventions related to specific examples of patterning of resist layers will be described. In particular, we will explain in detail the patterning of the gate electrode of the MO8 collector circuit. describes the use of a resist layer as a mask for The specific method of Koyu et al. of the present invention In fact, the ground side was only selected by C two cars to explain the blindness of :X, and on the other hand, the unexploded Light is only particularly suitable for this application and is limited to non-inventive English examples. (6) San thing? Not intended.

'A-side is = part of the gate-level composite mask of the vlO3 integrated circuit? Shows Ru. The pattern includes multiple gate electrodes 1°. -Process JO8 integrated circuits In some cases, electrode material 11 is applied on the surface of the semiconductor substrate. Enemy painting material layer/Kure, Pa Turns are formed and excess electrode material is removed, only 9 bottles? Shallow) If it is stomach. According to the tip arrangement of the present invention, a positive resist layer can be applied on the electric field. Yorikoku is achieved. Even though the gate electric train and the tooth pattern were begging for Manguo, there is no photo record. The resist is exposed to light by drawing it with an electron beam through the electrodes. electronic bee It is possible to create patterns with a high resolution of 1 quadrant, for example. .

The gate electrode pattern has a width of only a fraction of a micrometer. A giant monkey. time? Ensures process operation is consistent, high throughput, and compatible with manufacturing. ri42.

Electron beam, around the desired precise geometry 110, from the electrode to the edge of the 2 Only resist that extends outward to the edges? Expose. Remains that do not require precise depiction The rest of the resist is optically coated using a 1000-year mask. Is the area exposed to the electron beam already exposed? This stage of masking (5t ep) request (necessary fugoto mask l for two, rectangle 12 and different alignment , do) only reproduce the opaque one-sided shape of the number. Optical exposure 7;, remaining area Rapid exposure of resist material from? sequentially from large areas of the semiconductor substrate. Remove desired gate electrode material. Around the electrode 10 carved by the electron beam The resist is exposed to process light by an opaque rectangle provided by an optical mask. Protected from exposure during chemical exposure. The combined electron beam and optical exposure , thus excluding the overlying gate electrode 10, the entire resist in a single resist layer exposure of the sheet material.

After the bibrid exposure, the resist is developed and the exposed resist area is removed. do. The remaining resist on top of the final gate electrode is then used as an etch mask. used and undesired electrode materials can be removed by wet chemical etching, plasma etching, if necessary. etching using etching, reactive ion etching, or similar etching. Being pinched.

When carrying out the process according to the invention, both optical exposure and electron beam exposure are possible. A resist material that performs satisfactorily must be used. commercially available Many of the resist materials currently available are designed to work in this hybridization process. Available for One such resist is made by Allied Chemical Company. The PC1298F is also known as Allied P2025.

The pattern-forming resist encyclopedia is attached to the bottom plate 9, and the process operation is read through. It is advisable to use a thickening agent to ensure that it remains adhered throughout.

Adhesion (8) A process that includes both the dye stain, optical exposure of the resist, and electron beam exposure portions: If the two matches and the mark is nine, then it is rr. The adhesion promoter is approximately 2-3 micrometers wide. Even smaller positive unexposed resists may be needed if isolated islands of material are formed. Become. Uses double adhesive to ensure highly resistive adhesion This has been found to be particularly advantageous. In particular, a separate cure for each accelerator (Halogen-substituted silane accelerator and aminosilane with cure l step) It is advisable to use an accelerator.

Two accelerators, mutually compatible, optically magneton beam exposed resist sections increasing the different adhesion mechanisms provided by. Preferred halogen-substituted sila The material is vinyltrichlorosilane (VTS). Preferred aminosiler Materials such as hectimethyldisilazane (HMDS) are also used for 3-Divinyltetramethyldisilazene is preferred.

The following non-limiting working example illustrates the best mode contemplated by the inventors and illustrates the invention. and serve to further explain the invention.

Mien example I The semiconductor wafer used to create the MO3-1 circuit is a semiconductor wafer with a gate insulator. Doped polycrystalline silicon with layers! S placed on the insulator layer from +2 To become anxious due to a process involving a process. Polycrystalline silicon 7 circuits Pattern the pattern to form the base electrode.

The substrate was cleaned with dry nitrogen for 2 hours and exposed to water in an oven at 200°C. will be accomplished. After cooling to room temperature, the substrate was coated with 2.5 cc of vinyl trichloride. Immediately quench with a VTS solution consisting of Rahn and 50 cc of Coconut.

The substrate is then rotated at 500 rpm for 1 second and 5000 rpm for 10 seconds. . The VTS solution was warmed to 90°C in a lightly nitrogen-purified oven. 1 Thermal cure for 0 minutes. After cooling again to room temperature, the second adhesion promoter is applied to the substrate. applied to the base plate with undiluted 1,6-dipinyltetramethedisilazene. However, it rotates at 500 rotations for 1 second and then at 5000 rotations for 10 seconds. Second adhesion promotion The agent can be heated to 90°C for 10 minutes in a nitrogen-purged oven. It is cured like a swallow.

After cooling the substrate to room temperature again, PC12qsp resist and thin resist Bh A 2:1 diluted constant resist solution consisting of the following is applied to the adhesion promoting substrate. Board V, 500 rotations for 1 second, followed by +SOO rotation + rotation + 1 to 20 rometer thickness uniformity. Provides a uniform resist layer.

Pre-baking at 90°C for 60 minutes in air before exposing the resist-coated pattern to light. (Pτe−ρα.’cg). The substrate is first exposed with an electron beam, and then the register is exposed. The strike layer is begging for a puto kogoku pattern. Pattern synthesis "FM/W, electronic bee Mu, depends on the dose, and narrow gate in a sycophantic? =, both narrower gates (10) In order to create an image on the side, I experienced a recent exposure. Electronic video around the gate electrode pattern The system dose is therefore adjusted for gates of different thickness to be patterned. I grieve. The gate illumination area is approximately 1 to 2 μm for a 0.5 μm wide gate. c/　cm　7) 169μc for a gate with a width of 1.0 micrometers from λ / c Expose with a dose within the range up to door 2.

After e-beam exposure, the substrate is processed using conventional optical photoresist alignment equipment. Align by. Electron beam pattern, machining, 6, 0m W/c m” During the optical exposure of about 15 seconds, the aligned opaque head is covered. . Furthermore, during this exposure, patterns with dimensions (about 2 to 3 micrometers or more in thickness) are Exposure to Optical Magazine.

After bibrid lithography exposure, one electron beam exposure and one optical surface exposure For both of them, a single phenomenon is constructed using 1[υ] million resistive phenomena. It is manifested in . Motohara, diluted 2:1 with Dr. -900 phenomenon agent is used for immersion. D-900ti, This is a developer supplied to Polychrome Corporation. Phenomenon Vyu, immersion (Imulsion) is used to cool pure water (2 times at 1.1@), then spin/spray is applied. Rinse with water and spin dry.

After that, patterned 712 substrates using resist were heated at 90°C for 60 minutes. After 2'5 years, then CC1 based on plasma etching agent (2 Plasma etching process 11) It will be done. The resist material is removed from the substrate in an oxygen plasma and deposited on the gate insulator. Leave a patterned gate electrode placed on the wafer.

Example■ An integrated circuit board may include a semiconductor substrate having a thin gate insulator on one surface. given to. First layer of titanium silicide, second layer of polyimide, plasma Multilayer packaging of gate electrode material consisting of a third temporary layer of deposited silicon dioxide Provided on insulation. Adhesion promoter and resist material applied as in Example I be done. The multilayer gate electrode structure is patterned similarly to Example ■ with the following exceptions. It is formed. Since the multilayer structure has a different atomic number Z from polycrystalline silicon, The annulus beam energy is adjusted to a high value. The resist is 0.5 micrometre Approximately 148 μC/Cm” color 1.5 micrometer for the gate electrode width of the Due to the dose range up to approximately 151 μc/c m2 for the gate The child beam is exposed. Furthermore, the multilayer structure is etched. In some cases, plasma facilities and polyimide before finally plasma etching the titanium silicide. First, it is reactively etched.

Example 1 If the substrate, the phenomenon agent is made more rare to yield a longer, more controllable phenomenon time. Except for the translation, the processing is carried out in the same manner as in Embodiment I. Current 1 home drug Yo, ratio 1 (12) D-900 is diluted with water at 1:1 and the development time is correspondingly up to 45 seconds. is increased by

Example y The substrates are prepared and processed as in Example I, except for changes in development. current The image agent was D-900 diluted with water to a ratio of 3=2; Allow the player to paddle for 20 seconds.Bet/L/(pu d, ctl e 1 development is different from fusion development), the substrate is Only a fixed amount, i.e. the volume of developer is pushed upwards onto the sea urchin due to surface tension. Observe. The developer is poured onto the wafer and then after 20 seconds the developer is cleared. Spin/spray in hot water, then spin dry in air (2). be done.

In each of the above Examples I to (2), the Pattern-formed gate electrodes with minimum gate dimensions within the range of be done.

Thus, according to the invention, there is provided a hardware that fully meets the advantages and objects mentioned above. Drisography is given. The invention has been described by means of specific embodiments thereof. Although described and described, the invention is not intended to be so limited. professionally It will be appreciated by those skilled in the art after considering the foregoing that modifications and changes to the base are possible. Obviously it will be Katana Tatami Ni. Ike's substrate can be used except for etching mask A resist may be used, a resist may be used, or a different resist may be used. Different methods and thicknesses of resist may be applied. Resist materials used and their specificity Depending on the application, the exposure time and intensity will vary, and the developer can be used in a pond or in an oven. follow and includes all such modifications and changes that fall within the scope of the appended claims. It is intended that

Request for submission of translation of written amendment (Article 184, Paragraph 7, Paragraph 1 of Kanto) dated November 2, 1982, one Mr. Kazuo Wakasugi, Director General of the Bureau of Public Permits t# Display of patent application International application number PCT/US 83100273Z Title of invention Electron beam/optical hybrid lithography resist method 6, patent applicant Address: Shambab, Illinois 60196, USA.

1303 East Algonfin Road Motorola Inc. Polete Sodo Representatives: Luckner, Vincet, G.E. Nationality: United States of America 4. Deputy manager Address: 2-5-2-6, Minami Nagakuzu, Tatamarasu-ku, Tokyo, Catalog of Buko documents The scope of the claims 1 (Correction) Combines electron beam and optical lithography to form a resist layer on a substrate. By using the bibrid process to form a pattern, forming a positive resist layer on the substrate; forming a positive resist layer on the substrate; The resist layer is placed close to and surrounding the unexposed portion of the resist layer and must be removed. In the process of exposing the resist layer portion to Hamako beam, an optically opaque resist layer is placed on the substrate. Protect the unexposed areas from optical exposure by placing a mask with a The process of optically exposing portions of the resist layer not protected by the mask; Developing the resist to remove the exposed areas and removing the unexposed resist on the substrate. Process of leaving a mist pattern, metal fitting electron beam/optical bibrid lithography tic resist method.

2. Applying an adhesion promoter to the substrate before forming the positive resist layer The method of claim 1 further comprising the steps of:

3. (Correction) @Applying an adhesion promoter to the substrate, the positive layer on the substrate forming a resist layer, a first portion of the resist surrounding an unexposed portion of the layer; The process of exposing the e-beam exposing a first portion of the resist surrounding unexposed portions of the layer; , optically exposing a second portion of the resist surrounded by the first portion; The exposed first. developing the layer to remove the second portion; The process of leaving a pattern in the exposed area, A bibrid method in which a pattern is formed in a resist layer on a substrate comprising a substrate.

4. In step C2 of applying an adhesion promoter, the promoter is exposed to an electron beam and a light beam. 4. The method according to claim 3, wherein the method is selected so as to be compatible with both scientific and scientific processes.

5. The adhesion promoters are compatible with each other. Said claim comprising a second accelerator The method described in item 4.

6. The adhesion promoter may include a halogen-substituted silane and an aminosilane. The method described in item 4 of the scope of the request.

l. The herogen-substituted silane is vinyltrichlorosilane. The method described in section 6.

8. Aminosilane is a chemical compound consisting of 1,3-dipinyltetramethyldisilazane. The method described in item 6 of the scope of the request.

9 (Correction) In the electron beam exposure process, the area around the unexposed area is scanned by the main beam C2. forming a first portion adjacent to and surrounding the unexposed portion; The method according to claim 3.

(3) 10. Optical exposure process Section V, @marked layer area, optically opaque mass said claim further comprising a step of masking said unexposed portion with a mask to prevent optical double light from said unexposed portion. The method described in item 9 of the scope of the request.

1t (correction) applying a positive resist layer to the first portion of the layer; A step of exposing the unexposed resist area with a beam of light; optically exposing a second portion of the layer, wherein the first portion and the second portion are (regimen including precise geometric patterns) unexposed part of IJ? the surrounding resist layer It consists of the exposed part of 1. A resist layer deterioration process is performed to remove the exposed portion. With moderation.

The unexposed portion of the minus portion, the remaining portion, is rotated and attached to the material.

The unexposed portion of the layer is used as an etching mask, and the photoreceptor and etching mask are used as an etching mask. Is it necessary to include a process for monitoring? Precise geometric patterns etched into distinctive materials how to.

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Claims (1)

[Claims] 1. Combining ε-beam and optical phosphorography to pattern the resist layer on the substrate. In the hybrid process that forms the forming a positive resist layer on the substrate; forming a positive resist layer on the substrate; The resist layer is placed close to and surrounding the unexposed portion of the resist layer and must be removed. Electron beam exposure of the resist layer portion, said optically opaque head on the substrate Protect the unexposed areas from optical exposure by placing a mask with The process of optically exposing portions of the resist layer not protected by the mask; Developing the resist to remove the exposed areas and removing the unexposed resist on the substrate. Process of leaving a mist pattern, electronic dome with metal fittings/optical bibrid lithography tic resist method. λ Applying an adhesion promoter to the substrate before forming a positive resist layer 2. The method of claim 1, further comprising: 3. Applying an adhesion promoter to the substrate, applying a positive resist on the substrate , @ forming the first part of the resist with an electric current surrounding the unexposed part of the @2 layer. a step of exposing the child beam; (15) a step of optically doubling a second portion of the resist surrounded by the first portion; The exposed first. exposing said layer to remove a second portion of said layer; The process of leaving a pattern in the unexposed area, (regime on a substrate comprising) a bibrid method of forming a pattern on rH. 4. In the step of applying an adhesion promoter, the promoter is exposed to electron beam and optical 4. The method of claim 3, wherein the method is selected to be compatible with both treatments. 5. The adhesion promoters are compatible with each other. Said claim comprising a second accelerator The method described in item 4. 6. The adhesion promoter comprises a herogen-substituted silane and an aminosilane. The method described in item 4. Z. The halogen-substituted silane is vinyltrichlorosilane. The method described in section 6. 8. Aminosilane is a chemical compound consisting of 1,3-divinyl tramethyldisilacene. The method described in item 6 of the scope of the request. writing with a beam to form a first portion adjacent to and surrounding the unexposed portion; 7. The method of claim 6, comprising the step of: 10. Step of applying each of the seven positive resist layers separately, exposing the first part of the layer to an electron beam. Light and light exposure (16) The process of drawing the area around the area, optically exposing a second portion of the layer, wherein the first macroportion and the second portion are , of said resist layer surrounding unexposed portions of the resist layer containing a precise geometric pattern. The process consists of developing the resist layer to remove the exposed part and removing the exposed part. Ingredients, the unexposed parts of the layer remain attached to the material I); Using the unexposed portions of the layer as an etch mask, the material is etched. Etching a precise geometric pattern into a material characterized by a process of etching how to.