JPS5949712B2 - semiconductor rectifier diode - Google Patents
semiconductor rectifier diodeInfo
- Publication number
- JPS5949712B2 JPS5949712B2 JP5560179A JP5560179A JPS5949712B2 JP S5949712 B2 JPS5949712 B2 JP S5949712B2 JP 5560179 A JP5560179 A JP 5560179A JP 5560179 A JP5560179 A JP 5560179A JP S5949712 B2 JPS5949712 B2 JP S5949712B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- semiconductor
- rectifier diode
- type
- opposite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 129
- 239000012535 impurity Substances 0.000 claims description 19
- 239000000969 carrier Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/868—PIN diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Description
【発明の詳細な説明】 本発明は半導体整流ダイオードの改良に関する。[Detailed description of the invention] The present invention relates to improvements in semiconductor rectifier diodes.
従来、第１図に示す如く例えば５×１０１９ａｔｏｍ／
一程度の比較的高い不純物濃度を有する例えばＮ型の半
導体層１と、例えば１０１５ａをｏｍ／ｄ程度の如く半
導体層１に比し低い不純物濃度を有する例えばＮ型の半
導体層２と、例えば５×１０１８ａｔｏｍ／ｄ程度の如
く半導体層２に比し高い不純物濃度を有し且半導体層１
と逆の導電型即ちＰ型の半導体層３とがそれ等の順に順
次積層され、而して半導体層１の半導体層２側とは反対
側及び半導体層３の半導体層２側とは反対側に夫々金属
電極４及び５がオーミックに附されてなる構成の半導体
整流ダイオードが所謂ＰｉＮダイオードとして提案され
ている。所で斯る半導体整流ダイオード即ちＰｉＮダイ
オードは、ショットキ接合ダイオードに比し高い許容接
合温度及び逆方向耐圧を有すると共に、重いデューティ
比で使用しても高い動作余裕度を有する等の為に、ショ
ットキ接合ダイオードに比し信頼性のあるダイオードと
して有用されている。Conventionally, as shown in Fig. 1, for example, 5 x 1019 atoms/
For example, an N-type semiconductor layer 1 having a relatively high impurity concentration of about 1015a, for example, an N-type semiconductor layer 2 having a lower impurity concentration than the semiconductor layer 1, such as about 1015a om/d; The semiconductor layer 1 has a higher impurity concentration than the semiconductor layer 2, such as approximately ×1018 atoms/d.
and a semiconductor layer 3 of the opposite conductivity type, that is, P type, are sequentially stacked in that order, and the side of the semiconductor layer 1 opposite to the semiconductor layer 2 side, and the side of the semiconductor layer 3 opposite to the semiconductor layer 2 side. A semiconductor rectifier diode having a structure in which metal electrodes 4 and 5 are ohmically attached to each other has been proposed as a so-called PiN diode. However, such a semiconductor rectifier diode, that is, a PiN diode, has a higher allowable junction temperature and reverse breakdown voltage than a Schottky junction diode, and also has a high operating margin even when used at a heavy duty ratio. It is useful as a more reliable diode than a junction diode.
然し乍ら斯る第１図に示す如き半導体整流ダイオードの
場合、その半導体層１、２及び３が、第２図に示す如き
エネルギ準位を呈して半導体層１及び２間での電位障壁
φ１と半導体層２及び３間での電位障壁φ２とを有し、
而して電極４及び５間に電極５側を電極４側に対して正
とする電圧が与えられる場合、半導体層１の電子が半導
体層２を通つて半導体層３に流入して電極５側より電極
４側に向う順方向電流が内部に流れ、そしてこの場合半
導体層３個より半導体層２内に正孔が流入し、これによ
り半導体層２内に電子正孔プラズマが生成し、依つて今
半導体層１の不純物濃度をＮ、、正孔拡散長をＬ、；半
導体層２の厚さをＷ２；半導体層３の不純物濃度をＮ３
、電子拡散長をＬ３、厚さをＷ３：電極５側より電極４
側に向って内部に流れる順方向電流の電流密度をＪとす
るとき、半導体層１及び３が、ＮＩＬＩ＞＞Ｎ３Ｌ３又
はＮＩＬ，〉〉Ｎ３Ｗ３を満足せしめるべく構成されて
いる限り、Ｌ３くＷ３なる場合Ｌ３＞Ｗ３なる場合
で与えられる電子数Ｑ（正孔数と等しい）を以つて、半
導体層２にキヤリアが蓄積されることとなるものである
。However, in the case of a semiconductor rectifier diode as shown in FIG. 1, the semiconductor layers 1, 2 and 3 exhibit energy levels as shown in FIG. 2, and the potential barrier φ1 between the semiconductor layers 1 and 2 and the semiconductor has a potential barrier φ2 between layers 2 and 3,
When a voltage is applied between the electrodes 4 and 5 that makes the electrode 5 side positive with respect to the electrode 4 side, electrons in the semiconductor layer 1 flow into the semiconductor layer 3 through the semiconductor layer 2, and the electrode 5 side A forward current flows inward toward the electrode 4 side, and in this case, holes flow into the semiconductor layer 2 from the three semiconductor layers, thereby generating electron-hole plasma in the semiconductor layer 2. Now, the impurity concentration of semiconductor layer 1 is N, the hole diffusion length is L; the thickness of semiconductor layer 2 is W2; the impurity concentration of semiconductor layer 3 is N3.
, electron diffusion length L3, thickness W3: From the electrode 5 side to the electrode 4
When the current density of the forward current flowing inward toward the side is J, as long as the semiconductor layers 1 and 3 are configured to satisfy NILI>>N3L3 or NIL,>>N3W3, L3 becomes W3. Carriers are accumulated in the semiconductor layer 2 with the number of electrons Q (equal to the number of holes) given in the case L3>W3.
この為第１図にて上述せる半導体整流ダイオードの場合
、上述せる（１）又は（２）式の電子数Ｑを以つて蓄積
されるキヤリアの量に応じた時間によつて、半導体整流
ダイオードとしての高速動作が制限を受けるという欠点
を有するものである。Therefore, in the case of the semiconductor rectifier diode described above in FIG. 1, the semiconductor rectifier diode is This has the disadvantage that high-speed operation is limited.
この為従来、第３図に示す如く第１図に上述せる構成に
於て、半導体層３での電子拡散長Ｌ３を小とすべく半導
体層３内に深いエネルギ準位を与える例えばＡｕの如き
不純物６を導入せしめてなることを除いては第１図の場
合と同様の構成を有する半導体整流ダイオードが提案さ
れている。For this reason, conventionally, as shown in FIG. 3, in the configuration described above in FIG. A semiconductor rectifier diode has been proposed which has the same structure as that shown in FIG. 1 except that impurity 6 is introduced.
然し乍ら斯る構成による場合、半導体層３での電子拡散
長Ｌ３が小となることにより上述せる（１）式よりして
半導体層２に蓄積されるキヤリアの量（電子数Ｑ）が第
１図の場合に比し小となり、この為半導体整流ダイオー
ドとしての高速動作の制限が第１図の場合に比し緩和さ
れるとしても、深いエネルギ準位を与える不純物が半導
体層２内に導入されれば、半導体層２内での電子正孔プ
ラズマの生成が困難となつて順方向降下電圧が大となる
ので、深いエネルギ準位を与える不純物を半導体層３内
のみに限定して導入せしめるを要し、そしてそれに困難
を伴うものである。又従来第４図に示す如く第１図にて
上述せる構成に於て、Ｎ型の半導体層１上に半導体層２
となる半導体層を形成し、而してその半導体層内にその
半導体層１側とは反対側よりのＰ型不純物のイオンの注
入をなすことにより半導体層２とその上の厚さＷ３の十
分小なる半導体層３とを形成してなることを除いては第
１図の場合と同様の構成を有する半導体整流ダイオード
が提案される。However, in the case of such a configuration, since the electron diffusion length L3 in the semiconductor layer 3 becomes small, the amount of carriers (number of electrons Q) accumulated in the semiconductor layer 2 is calculated from the above equation (1) as shown in FIG. Therefore, even though the restrictions on high-speed operation as a semiconductor rectifier diode are relaxed compared to the case of FIG. 1, impurities that give a deep energy level are introduced into the semiconductor layer 2. For example, since it becomes difficult to generate electron-hole plasma in the semiconductor layer 2 and the forward voltage drop increases, it is necessary to introduce impurities that give a deep energy level only into the semiconductor layer 3. And it is difficult. Further, as shown in FIG. 4, in the conventional structure described above in FIG.
By forming a semiconductor layer, and implanting P-type impurity ions into the semiconductor layer from the side opposite to the semiconductor layer 1 side, the semiconductor layer 2 and the thickness W3 above it are sufficiently thickened. A semiconductor rectifying diode is proposed which has the same structure as that shown in FIG. 1, except that a small semiconductor layer 3 is formed.
然し乍ら斯る構成による場合、その半導体層３がその厚
さＷ３をして小なるものとして得られることにより上述
せる（２式よりして半導体層２に蓄積されるキヤリアの
量（電子数Ｑ）が小となり、この為半導体整流ダイオー
ドとしての高速動作の制限が緩和されるとしても、半導
体層３の厚さＷ３が小となることにより電極５の形成時
それによつて半導体層３及び２間の接合が破壊せしめら
れる’哩れを有するものである。更に従来第５図に示す
如く第１図にて上述せる構成に於て、Ｎ型の半導体層１
上に半導体層２となる半導体層を形成し、而してその半
導体層２上にＰ型不純物を含む多結晶半導体層Ｔを附し
、これより半導体層２となる半導体層内にＰ型不純物を
導入せしめることにより半導体層２とその上の厚さＷ３
の十分小なる半導体層３とその上のＰ型の多結晶半導体
層？とが形成され、一方この多結晶半導体層Ｔの半導体
層３側とは反対側に電極５が附されてなることを除いて
は第１図の場合と同様の構成を有する半導体整流ダイオ
ードも提案されている。However, in the case of such a configuration, the thickness W3 of the semiconductor layer 3 can be obtained as a smaller value, as described above (from the equation 2, the amount of carriers accumulated in the semiconductor layer 2 (number of electrons Q) is small, and therefore the restrictions on high-speed operation as a semiconductor rectifier diode are relaxed. However, since the thickness W3 of the semiconductor layer 3 is small, the thickness between the semiconductor layers 3 and 2 is reduced when forming the electrode 5. Furthermore, as shown in FIG. 5, in the structure described above in FIG. 1, the N-type semiconductor layer 1
A semiconductor layer that becomes the semiconductor layer 2 is formed on top, and a polycrystalline semiconductor layer T containing a P-type impurity is added on the semiconductor layer 2, and a P-type impurity is added to the semiconductor layer that becomes the semiconductor layer 2. By introducing the semiconductor layer 2 and the thickness W3 thereon,
A sufficiently small semiconductor layer 3 and a P-type polycrystalline semiconductor layer thereon? A semiconductor rectifier diode having the same structure as that shown in FIG. 1 is also proposed, except that an electrode 5 is attached to the side of the polycrystalline semiconductor layer T opposite to the semiconductor layer 3 side. has been done.
然し乍ら斯る構成による場合、その半導体層３がその厚
さＷ３をして小なるものとして得られることにより第４
図の半導体整流ダイオードの場合と同様に半導体整流ダ
イオードとしての高速動作の制限が緩和され、又半導体
層３の厚さＷ３が小となつても多結晶半導体層７が存す
るので、電極５の形成時それによつて半導体層３及び２
間の接合が破壊せしめられる儒れを有しないとしても、
多結晶半導体層Ｔが無視し得ない抵抗性を有する直列抵
抗として作用し、依つて半導体整流ダイオードとしての
順方向降下電圧が大となる欠点を有するものである。However, in the case of such a configuration, the thickness W3 of the semiconductor layer 3 can be made small, so that the fourth
As in the case of the semiconductor rectifier diode shown in the figure, the restrictions on high-speed operation as a semiconductor rectifier diode are relaxed, and even if the thickness W3 of the semiconductor layer 3 is small, the polycrystalline semiconductor layer 7 exists, so the formation of the electrode 5 When the semiconductor layers 3 and 2
Even if the bond between them does not have the strength to be destroyed,
This has the disadvantage that the polycrystalline semiconductor layer T acts as a series resistor with non-negligible resistance, resulting in a large forward voltage drop as a semiconductor rectifier diode.
依つて本発明は第１図にて上述せる半導体整流ダイオー
ドを基礎とするも、上述せる従来の欠点のない新規な半
導体整流ダイオードを提案せんとするもので、以下詳述
する所より明らかとなるであろう。Therefore, although the present invention is based on the semiconductor rectifier diode described above in FIG. 1, it is an object of the present invention to propose a new semiconductor rectifier diode that does not have the above-mentioned drawbacks of the conventional semiconductor rectifier diode, which will become clear from the detailed description below. Will.
第６図及び第？図は本発明に依る半導体整流ダイオード
の一例を示し、第１図との対応部分には同一符号を附し
て詳細説明はこれを省略するも、第１図にて上述せる構
成に於て、その半導体層３内に半導体層２側とは反対側
より電極５とオーミツクに接触し且半導体層２に達せざ
る深さｗを以つて半導体層２に比し高い不純物濃度を有
するを可とするＮ型の半導体領域８が、局部的に形成さ
れていることを除いては第１図の場合と同様の構成を有
する。Figure 6 and ? The figure shows an example of a semiconductor rectifier diode according to the present invention. Parts corresponding to those in FIG. 1 are given the same reference numerals and detailed explanation thereof is omitted. In the semiconductor layer 3, it is possible to have a higher impurity concentration than the semiconductor layer 2 by contacting the electrode 5 and the ohmic from the side opposite to the semiconductor layer 2 side and having a depth w that does not reach the semiconductor layer 2. The structure is similar to that of FIG. 1 except that the N-type semiconductor region 8 is formed locally.
尚この場合半導体層１，２，３、及び半導体領域８は夫
々５×１０１９ａｔ０ＷＶＣ！Ｉｔ，ｌＯｌ５ａｔＯｍ
／（−Ｄ，５×１０１８ａｔ０ｍ／ｄ及び１０２０ａｔ
０ｍ／ｄの不純物濃度とし得るものである。以上が本発
明による半導体整流ダイオードの一例構成であるが、斯
る構成によれば、半導体領域８の形成されていない領域
に対応する位置でみるとき、半導体層１，２及び３が第
８図にて実線図示の如き第２図の場合と同様のエネルギ
準位を呈するも、半導体領域８の形成されている領域に
対応する位置でみるとき、半導体層１，２及び３と半導
体領域８とが第３図にて点線図示の如きエネルギ準位を
呈しているものである。この為半導体層３がその半導体
領域８下の（Ｗ３−Ｗ′）＝ＷＢで表わされる厚さＷＢ
と等しい等価的な厚さを有するものとして作用し、この
為上述せる（２）式よりしても明らかな如く半導体層２
に蓄積されるキヤリアの量（電子数Ｑ）が第１図の場合
に比し格段的に小となり、依つて半導体整流ダイオード
としての高速動作の制限が第１図の場合に比し格段的に
緩和されるものである。このことは半導体層１上に半導
体層２となる半導体層を形成し、そしてその半導体層内
に半導体層１側とは反対側よりＰ型不純物を導入せしめ
ることにより半導体層３を半導体層２と同時に形成する
様になせば、この場合半導体層３の半導体領域８下の領
域の不純物濃度が半導体層３の表面濃度より十分小とな
るので尚更である。又半導体層３の半導体領域８下の厚
さＷＢが小でありさえすれば、半導体層３自体その厚さ
Ｗ３を所望に応じて大とし得るので、電極５の形成時、
それによつて半導体層２及び３間の接合が破壊されると
いう惺れもないものである等の大なる特徴を有するもの
である。尚上述に於ては半導体層１，３及び半導体領域
８が夫々Ｎ型、Ｐ型及びＮ型である場合に於て、半導体
層２がそれ等に比し低い不純物濃度を有するＮ型である
場合を例示したものであるが、半導体層１，３及び半導
体領域８が夫々Ｎ型、Ｐ型及びＮ型である場合に於て半
導体層２がそれ等に比し低い不純物濃度を有するＰ型で
あつても、上述せると同様の特徴が得られるものであり
、従つて本発明の他の例として斯る構成とすることも出
来、勿論上述せる「Ｎ型」を「Ｐ型］と読替えた構成と
することも出来、その他本発明の精神を脱することなし
に種々の変型変更をなし得るであろう。In this case, the semiconductor layers 1, 2, 3 and the semiconductor region 8 each have a thickness of 5×1019at0WVC! It,lOl5atOm
/(-D, 5×1018at0m/d and 1020at
The impurity concentration can be set to 0 m/d. The above is an example of the configuration of the semiconductor rectifier diode according to the present invention. According to such a configuration, when viewed from a position corresponding to the region where the semiconductor region 8 is not formed, the semiconductor layers 1, 2, and 3 are as shown in FIG. However, when viewed at a position corresponding to the region where semiconductor region 8 is formed, semiconductor layers 1, 2, and 3 and semiconductor region 8 exhibit the same energy level as in the case of FIG. exhibits an energy level as indicated by the dotted line in FIG. Therefore, the semiconductor layer 3 has a thickness WB below the semiconductor region 8 expressed as (W3-W')=WB.
Therefore, as is clear from equation (2) above, the semiconductor layer 2
The amount of carriers (number of electrons, Q) accumulated in It is something that can be alleviated. This can be done by forming a semiconductor layer that will become the semiconductor layer 2 on the semiconductor layer 1, and then introducing a P-type impurity into the semiconductor layer from the side opposite to the semiconductor layer 1, so that the semiconductor layer 3 becomes the semiconductor layer 2. It would be even better if they were formed simultaneously, since in this case the impurity concentration in the region of the semiconductor layer 3 below the semiconductor region 8 would be sufficiently lower than the surface concentration of the semiconductor layer 3. Further, as long as the thickness WB of the semiconductor layer 3 below the semiconductor region 8 is small, the thickness W3 of the semiconductor layer 3 itself can be increased as desired.
This has great features such as there is no possibility that the junction between the semiconductor layers 2 and 3 will be destroyed thereby. In the above description, when the semiconductor layers 1 and 3 and the semiconductor region 8 are of N type, P type, and N type, respectively, the semiconductor layer 2 is of N type having a lower impurity concentration compared to them. As an example, when semiconductor layers 1 and 3 and semiconductor region 8 are of N type, P type, and N type, semiconductor layer 2 is of P type having a lower impurity concentration than those. However, the same characteristics as described above can be obtained, and therefore, such a configuration can be used as another example of the present invention, and of course, the above-mentioned "N type" can be read as "P type". It is also possible to adopt a different configuration, and various other modifications and changes may be made without departing from the spirit of the present invention.
第１図は本発明の基礎となる従来の半導体整流ダイオー
ドを示す路線的断面図、第２図はそのエネルギ準位を示
す図、第３図、第４図及び第５図は夫々従来の半導体整
流ダイオードを示す路線的断面図、第６図は本発明によ
る半導体整流ダイオードの一例を示す路線的斜視図、第
７図はその縦断面図、第８図は第６図に示す本発明によ
る半導体整流ダイオードのエネルギ準位を示す図である
。FIG. 1 is a cross-sectional view showing a conventional semiconductor rectifier diode, which is the basis of the present invention, FIG. 2 is a diagram showing its energy level, and FIGS. 6 is a schematic perspective view showing an example of a semiconductor rectifier diode according to the present invention, FIG. 7 is a longitudinal cross-sectional view thereof, and FIG. 8 is a cross-sectional view of the semiconductor rectifier diode according to the present invention shown in FIG. 6. FIG. 3 is a diagram showing energy levels of rectifier diodes.
Claims (1)
半導体層に比し低い不純物濃度を有する第２の半導体層
と、該第２の半導体層に比し高い不純物濃度を有し且第
１の導電型とは逆の第２の導電型を有する第３の半導体
層とがそれ等の順に順次積層され、上記第１の半導体層
の上記第２の半導体層側とは反対側及び上記第３の半導
体層の上記第２の半導体層側とは反対側に夫々第１及び
第２の電極がオーミックに附されてなる半導体整流ダイ
オードに於て、上記第３の半導体層内に、上記第２の半
導体層側とは反対側より、上記第２の電極とオーミック
、に接触し且上記第２の半導体層に達せざる深さを以つ
て、第１の導電型を有する半導体領域が、局部的に形成
されてなる事を特徴とする半導体整流ダイオード。1 A first semiconductor layer having a first conductivity type, a second semiconductor layer having a lower impurity concentration than the first semiconductor layer, and a higher impurity concentration than the second semiconductor layer. and a third semiconductor layer having a second conductivity type opposite to the first conductivity type are sequentially stacked in that order, and the side of the second semiconductor layer of the first semiconductor layer is opposite to the first semiconductor layer. In the semiconductor rectifier diode, first and second electrodes are ohmically attached to a side of the third semiconductor layer and a side of the third semiconductor layer opposite to the second semiconductor layer, respectively. A semiconductor having a first conductivity type is brought into ohmic contact with the second electrode from the side opposite to the second semiconductor layer side and has a depth that does not reach the second semiconductor layer. A semiconductor rectifier diode characterized by a region formed locally.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5560179A JPS5949712B2 (en) | 1979-05-07 | 1979-05-07 | semiconductor rectifier diode |
| GB8006652A GB2050694B (en) | 1979-05-07 | 1980-02-27 | Electrode structure for a semiconductor device |
| NLAANVRAGE8001226,A NL188434C (en) | 1979-05-07 | 1980-02-29 | ELECTRODESTRUCTURE. |
| DE19803008034 DE3008034A1 (en) | 1979-05-07 | 1980-03-03 | ELECTRODE DEVICE FOR A SEMICONDUCTOR DEVICE |
| FR8004965A FR2456389B1 (en) | 1979-05-07 | 1980-03-05 | ELECTRODES STRUCTURE FOR SEMICONDUCTOR DEVICES |
| CA000347000A CA1150417A (en) | 1979-05-07 | 1980-03-05 | Electrode structure for a semiconductor device |
| US06/512,942 US4587547A (en) | 1979-05-07 | 1983-07-12 | Electrode structure for a semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5560179A JPS5949712B2 (en) | 1979-05-07 | 1979-05-07 | semiconductor rectifier diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55148469A JPS55148469A (en) | 1980-11-19 |
| JPS5949712B2 true JPS5949712B2 (en) | 1984-12-04 |
Family
ID=13003290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5560179A Expired JPS5949712B2 (en) | 1979-05-07 | 1979-05-07 | semiconductor rectifier diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5949712B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6163409U (en) * | 1984-09-30 | 1986-04-30 | ||
| JPH0318692Y2 (en) * | 1984-11-12 | 1991-04-19 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6204717B1 (en) * | 1995-05-22 | 2001-03-20 | Hitachi, Ltd. | Semiconductor circuit and semiconductor device for use in equipment such as a power converting apparatus |
-
1979
- 1979-05-07 JP JP5560179A patent/JPS5949712B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6163409U (en) * | 1984-09-30 | 1986-04-30 | ||
| JPH0318692Y2 (en) * | 1984-11-12 | 1991-04-19 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55148469A (en) | 1980-11-19 |
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