JPS5949685B2 - Ion implantation method - Google Patents

Ion implantation method

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Publication number
JPS5949685B2
JPS5949685B2 JP15832177A JP15832177A JPS5949685B2 JP S5949685 B2 JPS5949685 B2 JP S5949685B2 JP 15832177 A JP15832177 A JP 15832177A JP 15832177 A JP15832177 A JP 15832177A JP S5949685 B2 JPS5949685 B2 JP S5949685B2
Authority
JP
Japan
Prior art keywords
insulating film
ion implantation
ions
ion
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15832177A
Other languages
Japanese (ja)
Other versions
JPS5489475A (en
Inventor
元雄 中野
伸夫 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15832177A priority Critical patent/JPS5949685B2/en
Publication of JPS5489475A publication Critical patent/JPS5489475A/en
Publication of JPS5949685B2 publication Critical patent/JPS5949685B2/en
Expired legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Physical Vapour Deposition (AREA)

Description

【発明の詳細な説明】 本発明は、半導体装置に於ける絶縁膜の絶縁破壊を生ず
ることがないイオン注入法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ion implantation method that does not cause dielectric breakdown of an insulating film in a semiconductor device.

近年、イオン注入法は半導体装置を製造する際に適用さ
れる各種技法のうちの一つとして重要なものになつてい
る。ところ力ゝそのイオン注入法を実施した場合に絶縁
膜の絶縁破壊を生ずることが問題になつている。
In recent years, ion implantation has become important as one of various techniques applied when manufacturing semiconductor devices. However, when this ion implantation method is carried out, it has become a problem that dielectric breakdown of the insulating film occurs.

通常、絶縁膜自体にイオン注入する必要性はないが、例
えば或る種の半導体装置では、二酸化シリコン等の絶縁
膜上に多結晶シリコン膜を成長させ、しかも、それを所
要形状にパターニングした後でイオン圧入を行ない、そ
の多結晶シリコン膜を抵抗膜にする必要がある。この場
合には、多結晶シリコン膜をパターニングすると一部に
絶縁膜が露出されるので、イオン圧入を行なえば、その
絶縁膜にもイオンが圧入されることになる。このイオン
圧入のドーズ量が少なければ問題はないが、例えば1×
1015〔cln−2〕以上の高ドーズ量であると、絶
縁膜の表面電位が上昇し、種々の劣化の原因になるが、
特に問題になるのは絶縁破壊である。そこで、このイオ
ン圧入に依る絶縁破壊のメカニズムについて考えてみる
。即ち、第1図に見られるように、半導体基板1に二微
化シリコンからなる絶縁膜2を形成レこれにイオン3を
打込むとその電荷の一部は矢印P1で表わすようなバス
を通つてそのまま真直ぐに半導体基板1へ抜けてしまう
。また、イオン・ビームを振つて走査している場合等は
、電荷の一部は矢印P2で表わすようなバス、即ち絶縁
膜2の表面を通つてリークする。しかしながら、これ等
のバスのうち、バスP2は高インピーダンスであつて、
該バスP2が支配的な場合には全部の電荷を消失させる
ことができないから、絶縁膜2の表面には次第に電荷が
蓄積さ札例えば絶縁膜2上にフローティングした電極等
が存在すると、最後は絶縁膜2の絶縁を破つてその電極
から電荷が半導体基板1へ放出されることになる。その
場合、絶縁膜2は噴火口が形成されたような状態になる
。バスP、よりバスP2が支配的となつて絶縁膜2に電
荷が蓄積されていく様子は第2図のエネルギ・バンド・
ダイヤグラムに依つて説明される。即ち、絶縁膜2中に
イオン3が圧入されると、その表面には電子e・正孔れ
対が発生する。そして、イオン3の電荷は、正孔れに対
しては基板1の方向に強い電界を発生させるので、通常
であれば、バスP1に沿つて正孔れはその電界に依つて
基板1に到達し、また、残つた電子eはイオン3で中和
されて表面電荷は消失する筈である。ところ力、実際に
は、絶縁膜2にイオン3が打込まれると、その構造が破
壊され、正孔に対する多数のトラップが形成されるよう
であり、正孔れは第2図に記号れ’で示すようにトラッ
プされ、動けない状態になつていることが観察できる。
即ち、絶縁膜への高ドーズ量のイオン注入処理の際には
、バスP、は存在せず、バスP2によつてのみイオン電
荷を放准していると予想される。前記のようなメカニズ
ムで、絶縁層2の表面は正方向に高亀位になり、例えば
第3図aに見られるような設定をして、距離2L離れた
電極4間の中央、即ち、一方の電極4から距離Lの点に
於ける表面電位。は第3図bに見られる通りである〇こ
れからすると、半導体ウエハが大型になると、その電位
は急激に高くなることが理解できよう。尚、第3図bに
於けるW1は5(ニ)(2〔インチ〕)、W2は7.5
〔C!!L)(3〔インチ〕)、W,は10C−(4〔
インチ〕)の各ウエハを表わしている。第3図のデータ
を得た条件は、イオンリボロン(B+)、注入エネルギ
:80〔Ke〕,11;8〔μA〕(士1.4〔ル!?
〕)、絶縁膜2の厚さ:1.0〔μm〕であつた。本発
明は、絶縁膜を有する半導体ウエハにイオン注入を行な
つても、イオン電荷の滞留に依る絶縁破壊が生じないよ
うにするものであり、以下これを詳細に説明する〇本発
明では、前記のように、イオン注入を行なつた際に絶縁
膜2の表面近傍にトラツプされる正孔を解消させるよう
にしている。
Normally, there is no need to implant ions into the insulating film itself, but in some types of semiconductor devices, for example, a polycrystalline silicon film is grown on an insulating film such as silicon dioxide, and after patterning it into the desired shape. It is necessary to perform ion implantation to convert the polycrystalline silicon film into a resistive film. In this case, when the polycrystalline silicon film is patterned, a portion of the insulating film is exposed, so if ion injection is performed, ions will also be injected into the insulating film. There is no problem if the dose of this ion injection is small, but for example, 1×
If the dose is as high as 1015 [cln-2] or more, the surface potential of the insulating film will increase, causing various types of deterioration.
A particular problem is dielectric breakdown. Therefore, let us consider the mechanism of dielectric breakdown caused by this ion injection. That is, as seen in FIG. 1, when an insulating film 2 made of micronized silicon is formed on a semiconductor substrate 1 and ions 3 are implanted into it, a part of the charge is transferred through a bus as indicated by an arrow P1. Then, it passes straight into the semiconductor substrate 1. Further, when scanning is performed by swinging an ion beam, a portion of the charge leaks through the bus as indicated by arrow P2, that is, through the surface of the insulating film 2. However, among these buses, bus P2 is high impedance;
When the bus P2 is dominant, it is not possible to eliminate all the charges, so charges gradually accumulate on the surface of the insulating film 2. If, for example, there is a floating electrode on the insulating film 2, eventually The insulation of the insulating film 2 is broken and charges are released from the electrode to the semiconductor substrate 1. In that case, the insulating film 2 will be in a state where a crater has been formed. Figure 2 shows how the bus P becomes more dominant and the bus P2 becomes more dominant and charges are accumulated in the insulating film 2.
It is explained with the aid of a diagram. That is, when the ions 3 are press-injected into the insulating film 2, electron e/hole pairs are generated on the surface thereof. The charge of the ions 3 generates a strong electric field in the direction of the substrate 1 against the hole leakage, so normally, the hole leakage will reach the substrate 1 along the bus P1 depending on the electric field. However, the remaining electrons e are neutralized by the ions 3, and the surface charge is supposed to disappear. However, in reality, when ions 3 are implanted into the insulating film 2, the structure is destroyed and many traps for holes are formed, and the hole leakage is shown in Figure 2. As shown in the figure, it can be seen that it is trapped and unable to move.
That is, during high-dose ion implantation into an insulating film, bus P does not exist, and ion charges are expected to be released only through bus P2. Due to the above-mentioned mechanism, the surface of the insulating layer 2 becomes highly tilted in the positive direction. For example, by setting it as shown in FIG. The surface potential at a distance L from the electrode 4. As shown in FIG. 3b, it will be understood from this that as the size of the semiconductor wafer increases, its potential increases rapidly. In addition, W1 in Fig. 3b is 5 (ni) (2 [inches]) and W2 is 7.5.
[C! ! L) (3 [inches]), W, is 10C-(4 [inches]
[inch]) represents each wafer. The conditions for obtaining the data in Figure 3 are: ion ribon (B+), implantation energy: 80 [Ke], 11:8 [μA] (1.4 [μA])
]), and the thickness of the insulating film 2 was 1.0 [μm]. The present invention prevents dielectric breakdown due to retention of ion charges even when ions are implanted into a semiconductor wafer having an insulating film.This will be explained in detail below. In this manner, holes trapped near the surface of the insulating film 2 during ion implantation are eliminated.

具体的には、ターゲツト、即ち、イオン注入されるべき
半導体ウエハの近傍に紫外線源を配置し、紫外線で半導
体ウエハを照射しつつイオン注入を行なうものである。
Specifically, an ultraviolet source is placed near the target, that is, a semiconductor wafer to be ion-implanted, and ions are implanted while irradiating the semiconductor wafer with ultraviolet rays.

このようにすると、絶縁膜2の表面近傍にはイオン電荷
は蓄積されず、従つて絶縁破壊も生じない。これを第4
図のエネルギ・バンド・ダイアグラムを参照しつつ説明
する。
In this way, no ionic charge is accumulated near the surface of the insulating film 2, and therefore no dielectric breakdown occurs. This is the fourth
This will be explained with reference to the energy band diagram shown in the figure.

さて、イオン注入に依り表面に電子e・正孔h対が発生
することは前記の通りであるが、紫外線照射に依つても
電子e・正孔h対が発生する。
Now, as described above, electron e/hole h pairs are generated on the surface by ion implantation, but electron e/hole h pairs are also generated by ultraviolet irradiation.

しかも、紫外線に依る場合はイオン江入の場合と異なり
、絶縁膜2の全体、即ち、深いところにも発生する。従
つて、発生した正孔hの多くは絶縁膜2の表面近傍のト
ラツプの影響を受けることなく基板1に到達して放出さ
れてしまう。それに依り残つた電子eは絶縁膜2の表面
に移動して注入イオン3の中和に作用するものである。
尚、絶縁膜2の表面に於ける前記の如きの正の帯電を解
消するには、例えば、熱電子を打込むことも考えられる
であろうが、その場合、イオン江入量と電子注入量を平
衡させないと、解消が不完全になつたり或いは逆に負の
電荷が蓄積されるようなことが起る。しかしながら、本
発明では、電子eと正孔hの対を用いることで、その困
難さを除去している。即ち、絶縁膜2の表面に在る正電
荷が解消され、そこの電位が低下してくれば、紫外線照
射で発生した電子e・正孔h対には電界が強く作用しな
いことになり、従つて殆んどその場で再結合に依つて消
滅するものが多くなる。このように、本発明では常に、
自動的に中性を維持する方向に作用が行なわれる。以上
の説明で判るように、本発明に依れば、絶縁膜を有する
半導体ウエハにイオン注入を高ドーズ量で行なつても、
絶縁膜に絶縁破壊を生じる惧れは皆無になる。
Moreover, unlike the case of ion intrusion, in the case of ultraviolet rays, it occurs throughout the insulating film 2, that is, in deep parts. Therefore, most of the generated holes h reach the substrate 1 and are released without being affected by the traps near the surface of the insulating film 2. The remaining electrons e move to the surface of the insulating film 2 and act to neutralize the implanted ions 3.
In order to eliminate the above-mentioned positive charge on the surface of the insulating film 2, for example, it may be considered to implant hot electrons, but in that case, the amount of ions injected and the amount of electrons injected If they are not balanced, the resolution may be incomplete or, conversely, negative charges may accumulate. However, in the present invention, this difficulty is eliminated by using pairs of electrons e and holes h. In other words, if the positive charges existing on the surface of the insulating film 2 are eliminated and the potential there is lowered, the electric field will not act strongly on the electron e/hole h pairs generated by ultraviolet irradiation, and the As a result, many things disappear almost immediately on the spot due to recombination. In this way, the present invention always
Actions are automatically taken to maintain neutrality. As can be seen from the above explanation, according to the present invention, even if ion implantation is performed at a high dose into a semiconductor wafer having an insulating film,
There is no possibility of dielectric breakdown occurring in the insulating film.

そして、その実施には、イオン注入時に半導体ウエハを
紫外線ランプ等で照射するだけであるから容易に行ない
得る。
This can be easily carried out by simply irradiating the semiconductor wafer with an ultraviolet lamp or the like during ion implantation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はイオン注入に依る電荷蓄積に関する説明図、第
2図は正孔のトラツプを説明する為のエネルギ・バンド
・ダイアグラム、第3図はイオン注入に依つて半導体ウ
エハの絶縁膜表面に於ける電位が上昇することを説明す
るデータを表わすものでaはその際の設定を説明する略
図でありbは線図、第4図は本発明を実施した場合のエ
ネルギ・バンド・ダイアグラムである。 図に於いて、1は基板、2は絶縁嘆、3はイオン、4は
電源、eは電子、hは正孔である。
Figure 1 is an explanatory diagram of charge accumulation by ion implantation, Figure 2 is an energy band diagram to explain hole trapping, and Figure 3 is an illustration of charge accumulation on the surface of an insulating film of a semiconductor wafer by ion implantation. FIG. 4 shows data explaining that the potential increases when applied, a is a schematic diagram explaining the settings at that time, b is a line diagram, and FIG. 4 is an energy band diagram when the present invention is implemented. In the figure, 1 is a substrate, 2 is an insulator, 3 is an ion, 4 is a power source, e is an electron, and h is a hole.

Claims (1)

【特許請求の範囲】[Claims] 1 表面に絶縁膜を有する半導体ウェハにイオン圧入す
る際、半導体ウェハに紫外線を照射しつつ行なうことを
特徴とするイオン注入法。
1. An ion implantation method characterized in that when ions are injected into a semiconductor wafer having an insulating film on the surface, the semiconductor wafer is irradiated with ultraviolet rays.
JP15832177A 1977-12-27 1977-12-27 Ion implantation method Expired JPS5949685B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15832177A JPS5949685B2 (en) 1977-12-27 1977-12-27 Ion implantation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15832177A JPS5949685B2 (en) 1977-12-27 1977-12-27 Ion implantation method

Publications (2)

Publication Number Publication Date
JPS5489475A JPS5489475A (en) 1979-07-16
JPS5949685B2 true JPS5949685B2 (en) 1984-12-04

Family

ID=15669073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15832177A Expired JPS5949685B2 (en) 1977-12-27 1977-12-27 Ion implantation method

Country Status (1)

Country Link
JP (1) JPS5949685B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5882519A (en) * 1981-11-12 1983-05-18 Toshiba Corp Ion implantation for semiconductor
JPS5985858A (en) * 1982-11-09 1984-05-17 Toshiba Corp Ion implantation device

Also Published As

Publication number Publication date
JPS5489475A (en) 1979-07-16

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