JPS5882519A - Ion implantation for semiconductor - Google Patents
Ion implantation for semiconductorInfo
- Publication number
- JPS5882519A JPS5882519A JP18141181A JP18141181A JPS5882519A JP S5882519 A JPS5882519 A JP S5882519A JP 18141181 A JP18141181 A JP 18141181A JP 18141181 A JP18141181 A JP 18141181A JP S5882519 A JPS5882519 A JP S5882519A
- Authority
- JP
- Japan
- Prior art keywords
- ion implantation
- semiconductor
- substrate
- irradiated
- secondary electrons
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005468 ion implantation Methods 0.000 title claims abstract description 29
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000010894 electron beam technology Methods 0.000 claims abstract description 9
- 239000002245 particle Substances 0.000 claims abstract description 9
- 150000002500 ions Chemical class 0.000 claims description 11
- 239000010409 thin film Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 abstract description 13
- 239000012535 impurity Substances 0.000 abstract description 7
- 239000012212 insulator Substances 0.000 abstract description 5
- 230000006378 damage Effects 0.000 abstract description 4
- 230000005684 electric field Effects 0.000 abstract description 4
- 239000004020 conductor Substances 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 4
- 230000001678 irradiating effect Effects 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に高１１＆の不純物領域を形成する
半導体のイオン注入方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor ion implantation method for forming an impurity region with a height of 11& in a semiconductor device.
近年、イオン注入方法は非、常に広範囲に使われるよう
になって龜た１例えばＭＯ８半導体装置において、イオ
ン注入方法は、従来主としてチャネルのしきい値電圧の
；ントロールに用いられてきたのに対し、最近はソース
、ドレインの形成など高濃度の不純物領域の形成に用い
られるようになりできている・
このように高一度に電荷イオンを注入する場合、次のよ
うな問題点がある。In recent years, ion implantation methods have become widely used. For example, in MO8 semiconductor devices, ion implantation methods have traditionally been used primarily to control the threshold voltage of the channel. Recently, it has been used to form highly concentrated impurity regions such as sources and drains. When implanting charged ions at once in this way, there are the following problems.
注入イオンドーズをＮ（個／−）、荷電数を鳳、素電荷
ｑ−１，６Ｘ１０ Ｃ，注入が絶縁層になされてい
るとして、その誘電率なε（Ｆ／ｍ ）とする。Assuming that the implanted ion dose is N (number/-), the number of charges is 0, the elementary charge is q-1,6X10 C, and the implantation is made into an insulating layer, its dielectric constant is ε (F/m).
今、イオン注入が一様になされその電荷が絶縁物の両端
に電界Ｘを作るとすると、Ｅ （Ｖ／ｍ ）の大きさは
ｑＮ
Ｅ厘□
ε
となる。Now, assuming that ion implantation is uniform and the resulting charges create an electric field X at both ends of the insulator, the magnitude of E (V/m) is qN E □ ε.
この式に具体的な数値としてＭＯ８半導体装置のソース
、ドレインの拡散の例をとシ、絶縁物として５１０２を
仮定すると、ｎ ＝ ｌ 、Ｎ＝２Ｘ１０”個／−１ε
＝ ｇ。、 ＝３．５ Ｘ １０−” Ｆ ７ｍとなシ
、これを上式に代入するとＥ＝１ｘ１ｏ１１ｖ／ｍとな
る。As a specific value for this formula, let us take the example of diffusion of the source and drain of an MO8 semiconductor device, and assuming 5102 as the insulator, n = l, N = 2X10'' pieces/-1ε
= g. , = 3.5 x 10-''F 7m, and substituting this into the above equation yields E = 1x1o11v/m.
ところでＳｔＯ□の絶縁耐電界は約１０’Ｖ／ｍといわ
れているため、この電界がそのｉまかかれば絶縁族が破
壊されてしまうので、帯電した電荷を逃がすことが必要
となる。また通常、半導体にイオン注入する場合、フォ
トレジストをマスクトシテ用いているが、このフォトレ
ジストハ電導度が低く、またフォトレジストのない部分
や、島状に分離しているとともあるため、表面をリーク
して逃げる電荷が、注入される電荷よシも少く、次第に
大電荷が帯電して絶縁被層することが度々あった。By the way, the dielectric strength field of StO□ is said to be about 10'V/m, and if this electric field is applied to that i, the insulating group will be destroyed, so it is necessary to release the charged charges. In addition, when ion implantation into semiconductors is normally performed, a photoresist is used as a mask, but this photoresist has low conductivity, and there are areas without photoresist or separated into islands, so the surface The amount of charge that leaks out and escapes is smaller than the amount of charge that is injected, and it often happens that a larger charge gradually builds up and forms an insulating layer.
本発明は、このような問題点に鑑みなされたもので、絶
縁膜の破壊を防止して、大１ＩｌｃｒＩＬイオン注入を
可能にして高濃度不純物領域の形成に効果的な半導体の
イオン注入方法を提供するものである。The present invention has been made in view of these problems, and provides a semiconductor ion implantation method that prevents breakdown of the insulating film, enables large 1IlcrIL ion implantation, and is effective in forming a high concentration impurity region. It is something to do.
即ち本発明方法は、半導体に荷電イオンを２×１０ 個
／−以上注入する半導体のイオン注入方法において、イ
オン注入と同時に、半導体の表面に、２次電子を放出し
て中性化する粒子線を叩射すゐことを特徴とするもので
ある・以下本発明方法を詳細に説明する。That is, the method of the present invention is a semiconductor ion implantation method in which charged ions of 2×10 or more are implanted into a semiconductor, and at the same time as the ion implantation, a particle beam is used to neutralize the surface of the semiconductor by emitting secondary electrons. The method of the present invention will be explained in detail below.
本発明において、半導体にイオン注入する荷電粒子とし
ては、例えばＢ 、 Ａｓ・Ｐ・Ｓｌ・Ｇａ ｍ Ｉ！
に、 ８ｎ等が挙げられる。また本発明方法か適用され
るイオンドーズ量は２ｘ１０ 個／−以上の高１１１Ｋ
に大電流イオン注入する場合に効果的であり、上記未満
のドーズ量では絶縁物に加わる電界が低く、絶縁破壊の
問題は少ない。In the present invention, examples of charged particles to be ion-implanted into a semiconductor include B, As, P, Sl, Ga m I!
Examples include 8n. In addition, the ion dose applied by the method of the present invention is as high as 111K, which is more than 2x10 ions/-.
It is effective when carrying out large-current ion implantation, and when the dose is less than the above, the electric field applied to the insulator is low and there is little problem of dielectric breakdown.
また本発明において、２次電子を放出して半導体基板を
中性化する粒子線としては、例えば低速電子線と紫外線
がある。In the present invention, examples of particle beams that neutralize the semiconductor substrate by emitting secondary electrons include low-speed electron beams and ultraviolet rays.
低速電子線を照射する場合にはｔｏｏｏｖ以下で照射す
ることによシ、イオン注入による帯電した電荷が２次電
子としてはき出されて、基板を中性化するものである。When irradiating with a low-speed electron beam, by irradiating at a speed of less than too much, the electric charge generated by ion implantation is ejected as secondary electrons, thereby neutralizing the substrate.
この場合、１００ＯＶを越える高い電子線を照射すると
基板表面をチャーシア、プして逆に帯電量を増加させる
ので好ましくない。また低速電子線の照射角度は、半導
体基板に対して斜めに照射する場合が、最も２次電子が
出易く効果的である・
また紫外線を照射する場合には、３・７以上のエネルギ
ーを有するものを用いるととによシ、基板表面にトラ？
ｆ している電荷を２次電子として真空中あるいは導
電体へ向けて放出し、基板を中性化するものである・な
お紫外線の照射によ９２次電子を放出する荷電粒子はマ
イナスイオンに限られ−、Ａ■、Ｐなどのグラスイオン
の場合には適用することができない書
また上記方法に加え、本発明で紘荷亀イオンビームのス
キャニング電極の前に、電導性薄膜フィルターを設けて
、ここで電荷を吸収し、イオンのみを透過して、半導体
基板に注入するようにしても良い。との場合、電導性薄
膜フィルターとしてはＡＬ ａ Ｃｓ ＡＭなどの薄膜
を用いるが、これら薄膜による電荷吸収の作用は、イオ
ン注入条件や膜厚によシ異なυ制御が難しいため上記低
速電子線や紫外線の照射と併用すると効果的である。In this case, irradiation with a high electron beam of more than 100 OV is not preferable because the surface of the substrate becomes charsier and the amount of charge increases. In addition, regarding the irradiation angle of the low-speed electron beam, it is most effective when the semiconductor substrate is irradiated obliquely, since secondary electrons are easily generated. Also, when irradiating ultraviolet rays, it has an energy of 3.7 or more. If you use something, is there a problem with the surface of the board?
This method neutralizes the substrate by emitting the electric charge as secondary electrons into a vacuum or toward a conductor.The charged particles that emit 92nd electrons when irradiated with ultraviolet rays are limited to negative ions. In addition to the method described above, which cannot be applied in the case of glass ions such as A, A, P, etc., the present invention provides a conductive thin film filter in front of the scanning electrode of the ion beam. Here, the charge may be absorbed, and only ions may be transmitted through and implanted into the semiconductor substrate. In this case, a thin film such as AL a Cs AM is used as a conductive thin film filter, but the effect of charge absorption by these thin films is difficult to control υ depending on the ion implantation conditions and film thickness, so it is difficult to It is effective when used in combination with ultraviolet irradiation.
次に本発明の実施例について説明する。Next, examples of the present invention will be described.
実施例１
７リコン基板に一ロン０）を、次の注入条件でイオン注
入した。−ロンを５９ ｋ＠Ｖで注入し、ドーズ量は２
Ｘ１０ 個／ｒｒ？、照射時間２０分で、４インチシ
リコンウェハ１０枚にイオン注入したり
上記イオン注入と同時に、電子ビームを一１００Ｖ（試
料に刺して）のカソードよシ発射し、試料面に対して４
５＠で照射した。なおこのときの低速電子線のビーム電
流は１０ Ａとした。Example 1 Ion-implanted ions were implanted into a silicon substrate under the following implantation conditions. - Ron was implanted at 59 k@V with a dose of 2
X10 pieces/rr? For an irradiation time of 20 minutes, ions were implanted into 10 4-inch silicon wafers, and at the same time as the ion implantation, an electron beam was emitted from the cathode at 100 V (pierced into the sample), and the electron beam was applied to the sample surface at 4
Irradiated at 5@. Note that the beam current of the slow electron beam at this time was 10 A.
この結果、基板表面のポリシリコンの飛散や、酸化膜の
破壊は全く観察されず、良好な高濃度不純物領域を形成
することができた。As a result, no scattering of polysilicon on the substrate surface or destruction of the oxide film was observed, and a good high concentration impurity region could be formed.
実施例２
上記実施例と同一のイオン注入条件で、Ｉａンをイオン
注入すると同時に、Ｘ−ランプの紫外線をサファイヤ窓
を通して試料面に照射したなおこの場合、紫外線の照射
は５００ワ、トのＸ・ランｌを、レンズを使ってウェハ
全面を覆うように照射した〇
この結果、上記１！施例と同様に酸化膜の破壊は紹めら
れず、良好な高１１１１不純物領域を形成することがで
き九〇
以上説明した如く、本発明に係わる半導体のイオン注入
方法によれば、絶縁物の破壊を防止して、大電流イオン
注入を可能にして萬濃度不純物領域を良好に形成する仁
とができるものである。Example 2 Under the same ion implantation conditions as in the above example, Ia was ion-implanted and at the same time the sample surface was irradiated with ultraviolet rays from an X-lamp through a sapphire window.・Run l was irradiated using a lens so as to cover the entire wafer. As a result, the above 1! As in the example, the destruction of the oxide film was not introduced, and a good high-1111 impurity region could be formed.As explained above, according to the semiconductor ion implantation method according to the present invention, It is possible to prevent destruction, enable large current ion implantation, and form a highly concentrated impurity region in a good manner.
出願人代理人 弁理士 鈴 江 武 彦９１−Applicant's agent: Patent attorney Suzue Takehiko 91-
Claims (4)
以上注入する半導体のイオン注入方法において、イ・オ
ン注入と同時に、半導体の表面に、２次電子を放出して
中性化する粒子線を照射することを特徴とする半導体の
イオン注入方法。(1) Charged ions in semiconductor 2 x 10”/1
A semiconductor ion implantation method characterized in that, at the same time as the ion implantation, the surface of the semiconductor is irradiated with a particle beam that neutralizes the semiconductor by emitting secondary electrons.
とする特許請求の範囲＠１項記載の半導体のイオン注入
方法。(2) A semiconductor ion implantation method according to claim @1, characterized in that a low-velocity electron beam is used as the particle beam.
許請求の範曲第１項記載の半導体のイオン注入方法。(3) A semiconductor ion implantation method according to claim 1, characterized in that ultraviolet rays are used as the particle beam.
て行なうととを特徴とする特許請求の範囲＠１項記載の
半導体のイオン注入方法。(4) The ion implantation method for a semiconductor according to claim 1, wherein the ion implantation is performed through a conductive thin film filter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18141181A JPS5882519A (en) | 1981-11-12 | 1981-11-12 | Ion implantation for semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18141181A JPS5882519A (en) | 1981-11-12 | 1981-11-12 | Ion implantation for semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5882519A true JPS5882519A (en) | 1983-05-18 |
| JPH0517699B2 JPH0517699B2 (en) | 1993-03-09 |
Family
ID=16100287
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18141181A Granted JPS5882519A (en) | 1981-11-12 | 1981-11-12 | Ion implantation for semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5882519A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4933257A (en) * | 1986-10-13 | 1990-06-12 | Mitsubishi Denki Kabushiki Kaisha | Positive quinone diazide photo-resist composition with antistatic agent |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5489475A (en) * | 1977-12-27 | 1979-07-16 | Fujitsu Ltd | Ion implanting method |
| JPS5787056A (en) * | 1980-09-24 | 1982-05-31 | Varian Associates | Method and device for strengthening neutralization of ion beam of positive charge |
-
1981
- 1981-11-12 JP JP18141181A patent/JPS5882519A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5489475A (en) * | 1977-12-27 | 1979-07-16 | Fujitsu Ltd | Ion implanting method |
| JPS5787056A (en) * | 1980-09-24 | 1982-05-31 | Varian Associates | Method and device for strengthening neutralization of ion beam of positive charge |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4933257A (en) * | 1986-10-13 | 1990-06-12 | Mitsubishi Denki Kabushiki Kaisha | Positive quinone diazide photo-resist composition with antistatic agent |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0517699B2 (en) | 1993-03-09 |
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