JPS5947480B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device

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Publication number
JPS5947480B2
JPS5947480B2 JP52036179A JP3617977A JPS5947480B2 JP S5947480 B2 JPS5947480 B2 JP S5947480B2 JP 52036179 A JP52036179 A JP 52036179A JP 3617977 A JP3617977 A JP 3617977A JP S5947480 B2 JPS5947480 B2 JP S5947480B2
Authority
JP
Japan
Prior art keywords
layer
semiconductor
manufacturing
band
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52036179A
Other languages
Japanese (ja)
Other versions
JPS53123089A (en
Inventor
茂雄 山下
国男 相木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP52036179A priority Critical patent/JPS5947480B2/en
Publication of JPS53123089A publication Critical patent/JPS53123089A/en
Publication of JPS5947480B2 publication Critical patent/JPS5947480B2/en
Expired legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Semiconductor Lasers (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Description

【発明の詳細な説明】 本発明は、半導体装置の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

この方法は特に次に述べる如き半導体レーザの製造に極
めて有用なものである。 3以下、半導体レーザを例に
取つて説明する。
This method is particularly useful for manufacturing semiconductor lasers as described below. 3. In the following, a description will be given using a semiconductor laser as an example.

近年、信頼性が高くかつ横姿勢の安定な半導体レーザと
して、第1図に示すような、帯状凹溝をもつ基板上に多
層の半導体層を形成した構造のものが提案されている(
特願 昭和59−60009)。 3具体例を述べると
第1図において、1は基板結晶でn−GaAs基板、2
は帯状凹溝、3は第2の半導体層たとえばn−Gal−
xAlx層(x:: 0.3)4は第1の半導体層でG
aAs活性層、5は第3の半導体層たとえばp−Gal
−yAlyAs層(y″■■0.3〜0.4)、6は第
4の半導体層でn−GaAs層、7はp型不純物である
ところのZnの選択拡散領域、8、9はオーム性電極で
ある。この構造において光は主として層4中に分布する
が、帯状凹溝2の両側では光は一部GaAs基板1中ま
でしみ出すため、損失を生ずる。したがつて横方向に実
効複素屈折率の差が生じ、光とじ込め効果が現われる。
この効果は素子につくヤつけの構造で規定されるため、
電流や光強度に対して、レーザ発振姿態が安定になる。
本レーザに於ては、帯状凹溝2の上部に位置する活性層
に有効に、かつムラなく電流が流れるよう、Zn拡散領
域7と帯状凹溝2との相対位置を〜2μm程度以下の精
度で一致させることが必要である、したがつて、レーザ
素子製造における写真食刻の工程では、マスク合わせ用
の目印として何らかの指標が必要となる。
In recent years, a structure in which multiple semiconductor layers are formed on a substrate with band-shaped grooves, as shown in Figure 1, has been proposed as a highly reliable semiconductor laser with stable horizontal orientation (
Patent application 1983-60009). 3 To give a specific example, in FIG. 1, 1 is a substrate crystal, which is an n-GaAs substrate, and 2
3 is a band-shaped groove, and 3 is a second semiconductor layer, for example, n-Gal-
xAlx layer (x:: 0.3) 4 is the first semiconductor layer and G
aAs active layer, 5 is a third semiconductor layer such as p-Gal
-yAlyAs layer (y″■■0.3~0.4), 6 is the fourth semiconductor layer, which is an n-GaAs layer, 7 is a selective diffusion region of Zn, which is a p-type impurity, 8 and 9 are ohmic In this structure, light is mainly distributed in the layer 4, but on both sides of the strip groove 2, some of the light seeps into the GaAs substrate 1, causing a loss. A difference in complex refractive index occurs, and a light trapping effect appears.
This effect is determined by the layered structure of the element, so
The laser oscillation state becomes stable with respect to current and light intensity.
In this laser, the relative position of the Zn diffusion region 7 and the band-shaped groove 2 is adjusted to an accuracy of about 2 μm or less so that current flows effectively and evenly to the active layer located above the band-shaped groove 2. Therefore, in the photolithography process in laser device manufacturing, some kind of index is required as a mark for mask alignment.

従来、この指標としては、結晶成長を行つても溝が完全
に埋まわ切らないような、充分な深さをもつ穴を帯状凹
溝2とは別に設けたわ、基板表面に図形状に酸化膜を形
成して、成長後に基板溝の位置がわかるようにしていた
Conventionally, as an indicator of this, a hole with sufficient depth was prepared separately from the band-shaped groove 2 so that the groove would not be completely filled even when crystal growth was performed. A film was formed so that the position of the substrate groove could be determined after growth.

しかしながら、このような方法では、合わせマークとす
る図形がそのままの形状で残らずに変形し易いため、写
真食刻工程において、精度よくマスクを一致させること
が困難であつた。本発明の目的は、従来法の欠点をなく
し、前記半導体レーザを精度よく作製する製造方法を提
供することにある。
However, in such a method, the figure used as the alignment mark does not remain in the same shape and is easily deformed, making it difficult to accurately align the masks in the photo-etching process. An object of the present invention is to eliminate the drawbacks of conventional methods and to provide a manufacturing method for manufacturing the semiconductor laser with high precision.

上記目的を達成するため次の様な手段を用いる。The following means will be used to achieve the above objectives.

半導体レーザが組成の異なる多層結晶膜から構成されて
いることに着目し、化学エッチング液を選んで目的とす
る特定の結晶成長層のみを選択的にエッチングして、結
晶ウェハの部分的領域について、成長層を除去し、基板
結晶表面に形成した帯状凹溝(複数個、少な<とも2個
以上が好ましい。)を露出させ、これを写真食刻工程に
おける正確なマスク合わせ用指標として用いることを特
徴とする新しい製造方法を提案するものである。その結
果、レーザ素子製造において、精度を著しく改善できた
。以下、本発明を実施例を参照して詳細に説明する。
Focusing on the fact that semiconductor lasers are composed of multilayer crystal films with different compositions, we selected a chemical etching solution to selectively etch only the desired specific crystal growth layer, thereby etching a partial region of the crystal wafer. The growth layer is removed to expose band-shaped grooves (a plurality of grooves, preferably at least two or more) formed on the substrate crystal surface, and this is used as an index for accurate mask alignment in the photolithography process. This paper proposes a new manufacturing method with characteristics. As a result, we were able to significantly improve accuracy in laser device manufacturing. Hereinafter, the present invention will be explained in detail with reference to Examples.

第2図は本発明の実施例であるところの、写真食刻工程
で用いる。
FIG. 2 is used in a photolithography process, which is an embodiment of the present invention.

マスク合わせ用指標を形成する方法を示す断面図である
。図における1,3,4,5,6は第1図で説明した各
層である。それぞれの厚さは、n形GaAs基板1約4
00μm)n形Gal−XAlxAs層3(x=0.3
)約0.4μm)GaAs活性層4約0.1μM.p形
Ga,−YAlyAs層5約2μM,.n形GaAs層
6約1μmである。帯状凹溝2の巾は約6μm、深さ約
1μmで、400Itm間隔に、平行に形成されている
。合わせマークを形成するのにはまず、第2図aに示す
ように、一部を残して結晶表面にエツチング用マスク1
0としてアピエゾンワクスを塗布する。次に、b図に示
すように、化学エツチング法によつて第1層なる第2の
半導体層であるn−Ga,−XAlxAs3の中程まで
成長層をエツチングする。エツチング液にはリン酸:過
酸化水素:エチレングリコール=1:1:3(エツチン
グ速度20℃において0.6μm/Mm)を用いた。次
にcに示すように、第1層のGal.xAlxAsのみ
を選択的にエツチングするエツチング液を用いて、n−
Ga,−XAlxAs層3−を除去し、基板結晶表面に
形成した帯状凹溝を露出させる。Gal−XAlxAs
のみを選択的にエツチングするエツチング液としてはフ
ツ酸を用い、反応を速める目的で約70℃に加熱して行
つた。エツチング時間は20〜60−である。以後、レ
ーザ作製工程においては、この露出した基板結晶表面の
帯状凹溝を写真食刻法のマスク合わせ用指標に用いる。
FIG. 3 is a cross-sectional view showing a method of forming a mask alignment index. Reference numerals 1, 3, 4, 5, and 6 in the figure are the layers explained in FIG. 1. The thickness of each is approximately 4 times the n-type GaAs substrate 1
00μm) n-type Gal-XAlxAs layer 3 (x=0.3
) approx. 0.4 μm) GaAs active layer 4 approx. 0.1 μM. p-type Ga,-YAlyAs layer 5 about 2 μM, . The n-type GaAs layer 6 has a thickness of about 1 μm. The band-shaped grooves 2 have a width of about 6 μm, a depth of about 1 μm, and are formed in parallel at intervals of 400 Itm. To form alignment marks, first, as shown in Figure 2a, an etching mask 1 is applied to the crystal surface, leaving only a portion.
Apply Apiezon wax as 0. Next, as shown in Figure b, the grown layer is etched to the middle of the first layer, which is the second semiconductor layer of n-Ga, -XAlxAs3, by a chemical etching method. The etching solution used was phosphoric acid:hydrogen peroxide:ethylene glycol=1:1:3 (etching rate: 0.6 μm/Mm at 20° C.). Next, as shown in c, the first layer of Gal. Using an etching solution that selectively etches only xAlxAs, n-
The Ga, -XAlxAs layer 3- is removed to expose the band-shaped groove formed on the substrate crystal surface. Gal-XAlxAs
Fluoric acid was used as the etching solution for selectively etching only the wafer, and the reaction was heated to about 70° C. in order to speed up the reaction. Etching time is 20 to 60 minutes. Thereafter, in the laser manufacturing process, this band-shaped groove on the exposed substrate crystal surface is used as an index for mask alignment in photolithography.

その結果、第1図に示したところの半導体レーザ素子の
帯状凹溝とZn拡散部との相対位置を精度よく一致させ
ることが可能になつた。第3図は、マスク合わせ誤差が
どの程度改善されたかを示すヒストグラムである。
As a result, it has become possible to match the relative positions of the band-shaped groove of the semiconductor laser device shown in FIG. 1 and the Zn diffusion portion with high accuracy. FIG. 3 is a histogram showing how much the mask alignment error has been improved.

aは基板表面にSlO2酸化膜の図形を形成し、各半導
体層の成長後基板溝の位置を表示した従来方法による結
果、bは本方法によるものである。これより明らかなよ
うに、従来法ではマスク合わせ誤差が±4μm前後に大
きくバラついていたのが、本方法によるものではこれを
±2μm程度以下にまで改善することができた。本発明
により、素子作製精度が向上して、その結果素子特性、
素子作製歩留ヤが著しく改善された。
Figure a shows the result obtained by the conventional method in which a figure of a SlO2 oxide film is formed on the substrate surface and the position of the substrate groove is indicated after the growth of each semiconductor layer. Figure b shows the result obtained by the present method. As is clear from this, in the conventional method, the mask alignment error largely varied around ±4 μm, but with the present method, this could be improved to about ±2 μm or less. According to the present invention, the accuracy of device fabrication is improved, and as a result, the device characteristics,
The device manufacturing yield was significantly improved.

また、本発明は半導体基板に半導体層を形成した半導体
装置の位置合せにも適用出来る。
Further, the present invention can also be applied to alignment of a semiconductor device in which a semiconductor layer is formed on a semiconductor substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は高信頼性でかつ横姿態の安定な半導体レーザの
光の進行方向に対し直角な方向の断面図、第2図は本発
明の実施例であるところの、写真食刻工程用マスク合わ
せ指標を形成する方法を示す図、第3図A,bは従来方
法および本発明の方法を用いた場合のマスク合わせ誤差
を比較して示す、ヒストグラムである。
FIG. 1 is a cross-sectional view of a highly reliable and laterally stable semiconductor laser in a direction perpendicular to the direction of light propagation, and FIG. 2 is a mask for a photolithography process, which is an embodiment of the present invention. FIGS. 3A and 3B, which are diagrams showing a method of forming alignment indices, are histograms showing a comparison of mask alignment errors when using the conventional method and the method of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1 複数個の帯状の凹溝を設けた半導体基体表面上に、
半導体層を形成した構造を有する半導体装置の製造過程
において、半導体層を形成したる前記半導体基体の部分
的領域について、前記半導体層の少なくとも一部分を除
去して前記半導体基体に設けた帯状の凹溝を露出せしめ
、この凹溝を位置合せ指標として用いることを特徴とす
る半導体装置の製造方法。
1. On the surface of a semiconductor substrate provided with a plurality of band-shaped grooves,
In the manufacturing process of a semiconductor device having a structure in which a semiconductor layer is formed, a band-shaped groove is formed in the semiconductor substrate by removing at least a portion of the semiconductor layer in a partial region of the semiconductor substrate in which the semiconductor layer is formed. 1. A method of manufacturing a semiconductor device, characterized in that the groove is exposed and the groove is used as an alignment index.
JP52036179A 1977-04-01 1977-04-01 Manufacturing method of semiconductor device Expired JPS5947480B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52036179A JPS5947480B2 (en) 1977-04-01 1977-04-01 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52036179A JPS5947480B2 (en) 1977-04-01 1977-04-01 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS53123089A JPS53123089A (en) 1978-10-27
JPS5947480B2 true JPS5947480B2 (en) 1984-11-19

Family

ID=12462501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52036179A Expired JPS5947480B2 (en) 1977-04-01 1977-04-01 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5947480B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5643723A (en) * 1979-09-18 1981-04-22 Nec Corp Manufacture of semiconductor element
JP5863644B2 (en) * 2010-04-12 2016-02-16 株式会社がまかつ Manufacturing method of fishhook

Also Published As

Publication number Publication date
JPS53123089A (en) 1978-10-27

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