JPS59149076A - Manufacture of semiconductor optical integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent the disappearance of a mask alignment mark on the growth of a crystal on a semiconductor base body by forming the mask alignment mark on a semiconductor and forming a thin-film consisting of a virtric inorganic material on the mark. CONSTITUTION:An N<+> conductive layer 4 is crystal-grwon on a semi-insulating GaAs substrate 1, a substrate stepped-difference 5 or grooves 3 are formed through an etching method, and a vitric thin-film composed of SiO2, etc. is formed at the end section 2 of a sample. Multi-layer laminated films 6 consisting of GaAlAs/GaAs constituting a double hetero-type laser are crystal-grown from the upper section of the thin-film, but the films 6 are not grown on a section coated with the vitric film, and the state in which the stepped difference and grooves formed to the substrate 1 can be viewed is brought. a succeeding impurity diffusion process and a pattern alignment for an electrode and a wiring are facilitated and their accuracy is improved because the stepped difference, etc. formed to the substrate first as an alignment mark do not disappear and remain distinctly to the end by the coating of the vitric thin-film.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a crystal growth method for manufacturing an optical integrated circuit having a multilayer structure of compound semiconductors.

[Prior art]

Conventionally, for example, when manufacturing a laser diode on a semiconductor substrate with grooves, pattern alignment for p-side impurity diffusion and electrode formation is done by etching a portion of the sample to expose the grooves on the substrate. In reality, this is done using the exposed groove or the alignment mark, which is attached to the substrate at the same time as the groove, as a reference. However, this method of exposing the substrate is a difficult process, and if the etching occurs too much, it is impossible to stop the etching at the substrate surface if the composition of the substrate and the next layer is similar. there were. Therefore, it could only be applied to elements composed of very limited compositions. Moreover, the controllability of the process was also unstable.

[Purpose of the invention]

The present invention provides a method for pattern matching before and after crystal growth of a multilayer structure, which can be universally applied to semiconductor laser devices made of any composition of compound semiconductors.

[Summary of the invention]

In the crystal growth of a multilayer structure, in order to prevent marks previously made by etching or the like that serve as a reference for pattern alignment from disappearing, processing is performed to prevent crystal growth from occurring on the required portions. As the simplest and surest method,
This involves applying a thin glass film, such as a 5i02 film.

[Embodiments of the invention]

Figure 1 shows semi-insulating GaAs used in the fabrication of optical integrated circuits.
1 is a plan view of a substrate 1. FIG. Line H3 in FIG. 1 shows a groove provided in this substrate as a model.

This groove is used to provide a laser active region in a step portion (portion 5 in FIG. 2) provided in the substrate. This state is shown in FIG. 2 as a cross section of the semiconductor optical integrated circuit device. In actual manufacturing, a large number of grooves are formed on one substrate, a large number of elements are manufactured at the same time, and separation is performed as necessary. Note that 2 in Figure 1
This region is the region where the glassy thin film according to the present invention is to be formed, and a step (approximately 2 μm) (Fig. 2, 5) is added later, and on top of this,
The n-type conductive layer 4 with high impurity concentration is formed by liquid phase epitaxial method (
LPE). Furthermore, a semiconductor laminated layer 6 constituting a double hetero type laser composed of Ga Al and k 8 /Ga A 8 is grown on top of the semiconductor layer. Next, a required portion of the n-type conductive layer and the semi-insulating substrate are exposed by etching, and an electric circuit 11 is formed thereon, thereby fabricating an opto-electrical integrated circuit. In FIG. 2, area 10 is a connection area between the laser section and the electric circuit section, 8 is a metal electrode section for connection with the laser section, and 9 is a connection area between the laser section and the electric circuit section.
shows an ion-implanted layer by way of example. The specific circuit is of course designed depending on the purpose. However, the position of the step initially attached to the substrate (3 in Fig. 1 or 5 in Fig. 2) is important as a reference for pattern positioning in subsequent processes, and in the later LPE process,
It must not disappear.

Immediately after forming the step on the substrate, a glassy thin film such as f3 iQ2 or SiNx is applied to the approximately 2 mm wide portion (2 in FIG. 1) of the substrate, for example.

For example, CVD A/=2011 etc. to a thickness of about 500 people.
Since it does not disappear and remains clearly until the end, it is easy to match patterns for impurity diffusion processes, electrodes, and wiring, and the accuracy is very high.

The groove forming process is as follows.

First, an N1 conductive layer is crystal-grown on a semi-insulating GaAs substrate, and steps or grooves are formed on the substrate by etching using a photoresist as a mask. A thin glass film such as 8402, SiNx, Atz03, PSG (phosphorus glass), etc. is formed on the edge of the sample.

Next, a double hetero layer that will become a laser is crystal-grown from above, but it does not grow on the portion covered with the glassy film, leaving the steps and grooves formed in the substrate visible.

Various steps will be briefly explained below depending on the purpose of the device. The structure of the connecting portion between the laser section and the electric circuit section is formed by etching using a photoresist as a mask. At this stage, the substrate is exposed in the portion that will become the electric circuit section. An active region of an electric circuit is formed in this portion by ion implantation. Next, Zn is selectively diffused into the laser part using At20B and 5i02 as a mask to form a p-side electrical path. Thereafter, metal electrodes and metal wiring are formed by vapor deposition and lift-off to obtain a structure as shown in FIG.

In addition to the 5iQz film, the materials used to cover the parts used for alignment marks include PSG (phosphorus glass) film and 5iQz film.
A mixed or composite film of i02 and PSG, or a film made of silicon nitride or At203 may be used. The appropriate thickness is 0.01 μm (100 A) or more and 1 μm or less. If it is too thin, the film will not cover the substrate evenly.
Crystals form on it, making it very unsightly and defeating the purpose. Also, if it is too thick, unnecessary stress will be generated on the substrate, which will not only deteriorate the performance of the laser etc., but also cause the parts where the crystals have grown to
A step may be formed at the boundary with the part where crystal growth has been stopped by the coating, and a rise may occur, which will become a fatal defect in the subsequent precision machining process.

0.024 m to 0.07 pm (2
00 to 700 people) thickness is optimal.

〔Effect of the invention〕

By this method, a semiconductor device having a multilayer structure can be manufactured with high precision. In the laser part of the opto-electrical integrated circuit, the position where the p-side impurity is diffused (7 in Figure 2) is
) It was possible to precisely match the step part of the gold substrate, etc., and the threshold of the laser could be lowered. In addition, the electric circuit section,
The electrical connection of the laser part (Fig. 2, 8) can also be made with high precision.

Furthermore, the alignment mark according to the present invention is important because it serves as a reference for accurately assembling the entire electric circuit (FIG. 2, 9) in a predetermined position.

[Brief explanation of drawings]

FIG. 1 is a plan view of a semiconductor substrate wafer embodying the present invention, and FIG. 2 is a sectional view of an optoelectronic integrated circuit. 1... Semiconductor substrate, 2... Portion covered with glassy substance, 3... Groove made in the substrate, 4... N-type conductive layer with high impurity concentration, and... For laser attached to the substrate step, 6... GaA7As/ that constitutes a double heterostructure
Ga As multilayer laminated film, 7... Impurity diffusion region, 8... Metal electrode, 9... Ion implantation layer, 10.
... Connection portion between the laser section and the electric circuit section, 11... Electric circuit section. Patent applicant Makoto Ishizaka, Director of the Institute of Industrial Science and Technology −

Claims (1)

[Claims] 1. In manufacturing a semiconductor optical integrated circuit device in which a compound semiconductor layer is laminated on a predetermined semiconductor substrate and at least a semiconductor laser section and an electronic circuit section are integrated, a compound semiconductor layer is stacked on the semiconductor substrate. A semiconductor optical integrated circuit characterized by forming a mask alignment mark and further forming a thin film of a glassy inorganic material on the mask alignment mark to prevent the mask alignment mark from disappearing during crystal growth on the semiconductor substrate. Method of manufacturing the device. 2. The method of manufacturing a semiconductor optical integrated circuit device according to claim 1, wherein the mask alignment mark is a groove provided in the semiconductor substrate.