JPS5944781B2 - semiconductor integrated circuit chip - Google Patents

Description

[Detailed description of the invention] The present invention relates to a chip structure of a semiconductor integrated circuit.

In recent semiconductor integrated circuits, this is becoming more and more common.

High speed, low power (low energy), high integration and high reliability (
However, these are closely related to each other, and their respective advantages are also in conflict with each other. Therefore, each of these elements must be maximized and then balanced against each other to arrive at the most appropriate distribution. As more and more functions are required per chip, the power consumption per chip increases even if the power consumption per gate decreases.

This results in an increase in junction temperature, ie, a decrease in reliability. In conventional semiconductor structures, the tendency is to increase the degree of integration per unit area, which results in a high thermal resistance and a large increase in junction temperature, which is a drawback. Referring to FIG. 1, heat generated by a heat source on a thick plate on a low thermal resistance material is transmitted to the low thermal resistance material through the shaded area. Therefore, as a matter of course, it can be said that the greater the distance between the heat sources on the plate, the smaller the temperature rise at the heat source and the lower the thermal resistance equivalently. Conventional semiconductor structures have a large number of heat sources within a small area, resulting in high thermal resistance, and it can be said that the permissible power consumption per chip is approaching its limit. Of course, it is possible to reduce the overall thermal resistance by changing the chip mounting method.

The present invention aims to increase speed and improve reliability by lowering the thermal resistance of a semiconductor chip.

Although it is said that the power consumption per unit gate in recent semiconductor LSIs has become smaller as the degree of integration has increased, the energy consumption of circuits with outputs that drive circuits outside the chip is said to be faster. Therefore, the chip's output circuit must have considerably more energy than the circuit that has the output to drive the circuits within the chip.

As a result, the power consumption of the chip becomes large and the junction temperature rises.To lower this, it is desirable to make the chip larger, but this is contrary to our preference.

However, as the degree of integration increases and the number of functions per chip increases, the number of input/output terminals increases, and the chip area inevitably increases due to input/output terminals. If this objective can be achieved, a slight increase in chip area will not be a problem. In conventional semiconductor integrated circuits, the external gate section that drives the circuits outside the chip, which is the main source of heat generation, is located adjacent to the internal gate section that drives the circuits inside the chip. There is no heat dissipation effect as shown in Figure 1, and heat is superimposed, increasing thermal resistance.

Therefore, in the present invention, the collecting part 1 of the internal gate and the collecting part of the external gate are separated, and a heat dissipation part is provided around the collecting part to reduce the thermal resistance to the heat generated within the collecting part. By arranging pads for input/output terminals in the dissipation part, a multi-terminal structure can be created, and by connecting these metal leads to a low thermal resistance board, heat can be dissipated through these leads as well. However, since the effective area of the circuit section is the same as the conventional one, there is no effect on fractional fraction.

In order to achieve our objectives of high performance (high speed) and high reliability (low temperature), we must minimize the product of energy and thermal resistance. Furthermore, the above objective is achieved by minimizing thermal resistance.

Next, an embodiment of the present invention will be described with reference to the drawings.

A semiconductor LSI is divided into a low-energy internal gate section for driving circuits inside the chip and a high-energy external gate section for driving circuits outside the chip. Figure 2 shows a conventional semiconductor integrated circuit structure. , 11 is an internal gate section, 12 is an external gate section, 1
3 is a pad for input/output terminals. FIG. 3 is a reference example of a semiconductor integrated circuit structure according to the present invention. As shown in the figure, the chip area is somewhat increased and an area 14 for heat dissipation is provided around the external gate part. In FIG. 4, the internal gate section and the external gate section are further separated to avoid heat overlap and reduce thermal resistance. 15 is an internal gate section, and 16 is an external gate section. Reference numeral 17 is a terminal pad, and 18 is a separation area between the innoternal gate section and the external gate section, which is an area for heat dissipation.

Since the chip area of the semiconductor shown in FIGS. 3 and 4 is larger than that of the semiconductor shown in FIG. 2, it has the advantage of allowing more terminals, and the effective area of the circuit section is Since the effective area is the same as that of the semiconductor circuit shown in FIG. 2, there is no effect on the yield. The semiconductor shown in FIG. 5 further increases the number of terminals by arranging pads for terminals in the separation area between the innoternal gate section and the external gate section, and allows heat to escape through the terminal leads 19. This is aimed at reducing the thermal resistance as well. As explained above, the present invention has the effect of lowering the thermal resistance of the chip and increasing the number of terminals that can be taken out by expanding the layout of the circuits on the semiconductor chip as much as possible.

[Brief explanation of the drawing]

Figure 1 shows the conduction path of heat generated by a heat source on the board, Figure 2 shows a conventional semiconductor structure, and Figures 3 and 4 show the semiconductor structure of the present invention. FIG. 5 is a diagram showing a reference example of a structure, and FIG. 5 is a diagram showing an example of a semiconductor structure of the present invention. The symbols used in the drawings will be explained below. 10...
Heat source. 11,15...I/Ternal gate gathering part. 12, 16... External gate gathering part, 13, 17... Input/output terminal pad,
14, 18... Heat dissipation part, 19... Metal lead part.

Claims (1)

[Claims] 1. The first circuit has a first circuit assembly on the input side of the chip, a second circuit assembly on the output side of the chip, and a plurality of pads for connection to the output terminal. A semiconductor integrated circuit chip, comprising a heat dissipation section for reducing thermal resistance to heat between an assembly section and the second circuit assembly section.