JPS5943526A - Manufacture of resin sealed type electronic part - Google Patents
Manufacture of resin sealed type electronic partInfo
- Publication number
- JPS5943526A JPS5943526A JP15410682A JP15410682A JPS5943526A JP S5943526 A JPS5943526 A JP S5943526A JP 15410682 A JP15410682 A JP 15410682A JP 15410682 A JP15410682 A JP 15410682A JP S5943526 A JPS5943526 A JP S5943526A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- die
- lead frame
- sealed
- type electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 title claims abstract description 10
- 229920005989 resin Polymers 0.000 title claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 title description 9
- 239000002131 composite material Substances 0.000 claims abstract description 6
- 239000012778 molding material Substances 0.000 claims description 3
- 238000000465 moulding Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 5
- 238000005266 casting Methods 0.000 abstract description 3
- 239000003822 epoxy resin Substances 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 229920000647 polyepoxide Polymers 0.000 abstract description 3
- 238000000748 compression moulding Methods 0.000 abstract description 2
- 239000005011 phenolic resin Substances 0.000 abstract 2
- 238000004382 potting Methods 0.000 abstract 2
- 230000003213 activating effect Effects 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 description 4
- 238000010924 continuous production Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000004641 Diallyl-phthalate Substances 0.000 description 1
- 102000006835 Lamins Human genes 0.000 description 1
- 108010047294 Lamins Proteins 0.000 description 1
- 241000294754 Macroptilium atropurpureum Species 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- QUDWYFHPNIMBFC-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,2-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=CC=C1C(=O)OCC=C QUDWYFHPNIMBFC-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 210000005053 lamin Anatomy 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229920002554 vinyl polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は電子機器、電気機器等に用いられる樹脂封止型
電子部品の！！！！造方法に関するもので、その目的と
するところは生爪多品種生産、連続生産を可能ならしめ
且つ不良発生率を低下せしめることＫある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to resin-sealed electronic components used in electronic equipment, electrical equipment, etc. ! ! ! This relates to a manufacturing method, and its purpose is to enable the production of a wide variety of raw nails, continuous production, and to reduce the rate of defects.
従来の樹脂封止バｌＪ電子部品の製造方法は第１図に示
すようにリードフレームｌに素子２をダイボンディング
してからインナーボンティング８し次にバンシベーショ
ン４してカラトランスファー成１囮１．で素子を樹脂５
で封屯して樹脂封止型電子部品を得るもので、大量少品
種生ρ４、バッチ生産に好適であるが少１牧多品種生産
、連続生産に不向きで且つ不良発生率も６〜７％と高い
ものであった。The conventional manufacturing method for resin-sealed electronic parts is as shown in FIG. ．． The element is made of resin 5
It is suitable for high-volume, small-variety production, ρ4, batch production, but is unsuitable for small-scale, high-mix production, continuous production, and has a defect rate of 6 to 7%. It was very expensive.
本発明ｔ」上記欠点を解決するもので、リードフレーム
の士「面金成形材料で挾み複合タブレットに一体化して
から成形後、該成形品に素子をダイインナーボンディン
グしてから素子２ ボンディングで封１にするため少量
多品種生産、連続生産をＭｌ能ならしめ且つ不良発生率
を１〜２％に低下させることができだものである。The present invention solves the above-mentioned drawbacks.The lead frame is sandwiched with a metal molding material and integrated into a composite tablet, and after molding, the element is die-inner bonded to the molded product, and then the element 2 is bonded. In order to reduce the number of seals, it is possible to make small-lot, high-mix production and continuous production more efficient, and to reduce the defect rate to 1 to 2%.
以下本発明の一実施例を第２図のＩＷ＋而にまり貯〜明
する。１ ）」金属製リードプレー１・で、リーじフＶ
−ム１の上Ｆ 而’ｓ） ７エフール樹１１ｉｆ、エポ
キシ樹脂、不飽和ボリエヌデル樹脂、ジアリルフタレー
トζ９１脂、シリコン樹脂、・′ラミンｊ＋・・１脂、
ポリアミド、ポリイミド、ボリフ゛タジ］ニン、ポリス
ルフォン、ボリウレクン等の単独又Ｑｊ混合物又ｔ」ｙ
；４性物からなる成形材料で挾み複合タブレアトロ（で
一体化してから圧縮成形等で成形後、Ｊ々＋：′ｉ、形
品７に素子２ｆ６：ダイインナーボンディング８してか
ら素子２全フ丁ノール樹脂、エボギシ樹脂、イ＜ ＋ｊ
ｉ・（「［Ｊポリｌステル１１！Ｉｌ 脂、ジアリルフ
タレ−１−＋ηｌ 脂、シリフン（６寸１ｉ旨、５３ミ
リアミド、ポリイミド、−１！すブタジェン、ポリスル
フォン、ポリウレタン等の中独又は９１．４１物又は研
・ｌ’ｌ□ ’ｈ＋からなる注形材でボッティング９で
封１トして（Ｉ７１脂封＋、ｌｘ型１Ｆ、子部品を得る
ものである。なりぶ了、ｑ゛イインリーボンデイングり
−ｌ−′７レーム表面に！戊形材判や注形材との接着ｆ
１を・向上させるだめの−ＩＩ処理、］−ティング処＋
ＩＪ１等（７）活性化処理音節し２−Ｃ棧くこともでき
るものであン）、以ト１？ｈ！明したように本発明の＋
、：１＋脂封１に型７（ｆ、子部品の製造方法によれば
少ＦｆＬ多品挿生産、連続生戸Ｃ全実現することができ
且つリードフレームの変形が全くないため不良発生率を
従来方？Ｊξより５％低［さすることができたものであ
る。An embodiment of the present invention will be explained below based on IW+ in FIG. 1)"Metal lead play 1, leaf V
7 Efur resin 11if, epoxy resin, unsaturated Boriendel resin, diallyl phthalate ζ91 resin, silicone resin, Lamin j+...1 resin,
Single or mixture of polyamide, polyimide, polyvinyl, polysulfone, polyurecne, etc.
; Sandwiched with a molding material consisting of four properties, integrated with a composite table atro (and then molded by compression molding etc.), J+:'i, molded product 7, element 2f6: die inner bonding 8, then element 2 Futonol resin, Ebogishi resin, i < +j
i. Seal with botting 9 using a casting material consisting of 41 parts or 1'l□'h+ (I71 fat seal +, lx type 1F, to obtain the child parts. Iinri Bonding - l-'7 On the surface of the frame! Adhesion with molded materials and cast materials f
-II processing to improve 1, ]-ting processing +
IJ1, etc. (7) Activation processing syllables can also be used as 2-C. h! As explained above, the +
,: 1 + Grease seal 1 to mold 7 (f) According to the manufacturing method of the sub-components, it is possible to achieve low FfL multi-item insertion production, continuous raw door C, and there is no deformation of the lead frame, so the defect rate is reduced. 5% lower than the conventional method?Jξ.
牟ｊｌｉン１に従来の１．’、’１指封（ト型重了部品
の１Ｌｆｕ Ｉ！！ｉ方法の簡略Ｔ１（−図、：’ｎ
２１図＋１本発明による＋Ｙｆ１脂封＋ト’！１シ゛取
子部品の叫＋＋’ｊ ］Ｊ法の簡略工程図である。
■（・Ｊリードフレーム、２は素子、８はインナーボン
ディング、４１・Ｊバ、シベー・・４ン、 ５１：１
ｊ’ｐＪ ＩＩ？（，６は複合メブレ、ト、７ ｋＪ、
Ｉｊ’ｊ ’ｌジ品、８ ｉｆダイインナーボンディ
ング、９ ）：ｊ ＋１ｒ 、、フ゛イングである。
特Ｗ「出願人
松ト１１．工（′１式会社
代用１人）「却下 竹 元 倣 九
（に１か２名）
ェ）”ｔ １ ｊ、Ｊ
第２ｒり１
１
７
／The conventional 1. ',' 1 finger seal (1Lfu I!!i method of 1 finger seal (-Fig., :'n
Figure 21+1+Yf1 fat sealing +to' according to the present invention! This is a simplified process diagram of the J method for 1-shield lever parts. ■(・J lead frame, 2 is element, 8 is inner bonding, 41・J bar, side...4, 51:1
j'pJ II? (, 6 is a composite mesh, 7 kJ,
Ij'j'lji product, 8 if die inner bonding, 9): j +1r, . Special W "Applicant Matsuto 11. Eng ('1 type company substitute 1 person) "Rejected Takemoto imitation 9 (1 or 2 people) e)"t 1 j, J 2nd rri 1 1 7 /
Claims (1)
合タブレットに一体化してから成形後、該成形品に素子
をダイインナーボンディングしてから素子をボッティン
グで封止することを特徴とする樹脂封止型電子部品のｍ
進方法。(1) A resin characterized in that the upper and lower surfaces of a lead frame are sandwiched between molding materials and integrated into a composite tablet, and after molding, an element is die-inner bonded to the molded product, and then the element is sealed by botting. m of sealed electronic components
How to proceed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15410682A JPS5943526A (en) | 1982-09-03 | 1982-09-03 | Manufacture of resin sealed type electronic part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15410682A JPS5943526A (en) | 1982-09-03 | 1982-09-03 | Manufacture of resin sealed type electronic part |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5943526A true JPS5943526A (en) | 1984-03-10 |
Family
ID=15577049
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15410682A Pending JPS5943526A (en) | 1982-09-03 | 1982-09-03 | Manufacture of resin sealed type electronic part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5943526A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6464254A (en) * | 1987-09-03 | 1989-03-10 | Toshiba Corp | Solid-state image sensor and manufacture thereof |
| JPH09213826A (en) * | 1996-02-01 | 1997-08-15 | Nec Corp | Package |
-
1982
- 1982-09-03 JP JP15410682A patent/JPS5943526A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6464254A (en) * | 1987-09-03 | 1989-03-10 | Toshiba Corp | Solid-state image sensor and manufacture thereof |
| JPH09213826A (en) * | 1996-02-01 | 1997-08-15 | Nec Corp | Package |
| US5905301A (en) * | 1996-02-01 | 1999-05-18 | Nec Corporation | Mold package for sealing a chip |
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