JPS5941201B2 - Reference voltage compensation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reference voltage generating circuit with both positive and negative polarities used in analog-to-digital converters, digital-to-analog converters, and the like.

Encoding FDM signals, broadcast program signals, and various image signals requires high-speed, high-precision analog-to-digital converters. In order to obtain especially high-precision characteristics, a method of using a bipolar ladder-type resistor network in the local decoding circuit of a feedback encoder has been widely used. In this case, it is necessary to apply positive and negative reference voltages having exactly the same absolute value to the ladder-type resistor network. In other words, if the absolute values of the reference voltages of both polarities are not equal, the quantization step for the positive region and the quantization step for the negative region of the input signal will be different.
As a result, second-order distortion noise is generated during the encoding or decoding process. An object of the present invention is to provide a compensation circuit for obtaining a reference voltage in which the absolute values of both positive and negative polarities are exactly equal.

The present invention includes a reference voltage generation circuit that generates a reference voltage of either positive or negative polarity, an output of the reference voltage generation circuit is given to one input, and transistors of the two input circuits are of opposite conductivity type. a comparison amplification circuit constituted by a transistor; the output of the comparison amplification circuit is level-converted to a polarity opposite to the one polarity, and the voltage applied to the one input of the comparison amplification circuit has the same absolute value and polarity; The present invention is characterized in that it includes a potential conversion circuit that applies an opposite voltage to the other input of the comparison amplifier circuit, and an output terminal that outputs the voltage generated at the two inputs of the comparison amplifier circuit as a reference voltage.

Hereinafter, the present invention will be explained in detail using embodiment drawings.

FIG. 1 is a block diagram of a circuit according to an embodiment of the present invention.

In the figure, 1 is a reference voltage generation circuit, 2 is a comparison amplifier circuit, 3 is a potential conversion circuit, and 4 and 5 are two inputs of the comparison circuit. The output of the reference voltage generation circuit 1 is coupled to one input 4 of the comparison amplifier circuit 2, and the output of the comparison amplifier circuit 2 is feedback-coupled to the other input 5 of the comparison amplifier circuit 2 via the potential conversion circuit 3. has been done. To explain the operation of the circuit configured in this way, the reference voltage generation circuit 1 generates a positive reference voltage V.
, is occurring. As a result, a voltage appears at the output of the comparison amplifier circuit 2, and the voltage Vt is subtracted by the potential conversion circuit, and a voltage 2 appears at the input 5. If the gain of the comparison amplifier circuit is μ, this relationship is V
2=μ(V1+V2)−Vt(1).

In other words, this comparison amplifier circuit 2, as originally intended,
Since this is a circuit to obtain two voltages with equal absolute values and opposite signs, we compare the difference in the absolute values of two voltages with different signs, that is, the formal sum of the two voltages, and calculate this as zero. This is a circuit that controls so that Therefore, what is in the parentheses of the above equation (1) is not the "difference" but the "sum" of V1 and V2.V2 is calculated from this.Here, if the gain μ of the comparison amplifier 2 is set to be large enough, μ〉〉1
Therefore, equation (2) can be expressed as follows.

Therefore, in order to obtain positive and negative reference voltages with equal absolute values as the initial objective, Vt should be selected so that the sum of the second and third terms in equation (3) becomes zero. In other words, Vt
It would be sufficient to determine.

Here, assuming that the output voltage V1 of the reference voltage generating circuit 1 slightly fluctuates by ΔV1, the voltage 2' of the input 5 at that time is given by equation (3).

In other words, for a variation in ΔV1 of the reference voltage, a variation of -ΔV1--ΔV1 is given to V2, and if the gain μ is made large, the absolute values of V1 and V2 will always be equal. You can leave it there.

For example, if the gain μ of the comparator amplifier 2 is 103, which is usually easily obtained, 1V21 is 1V1 with an accuracy of 0.1%.
It follows equal to 1. FIG. 2 is a specific circuit diagram of a circuit according to an embodiment of the present invention.

Each part in the figure is given the same reference numeral as in FIG. 1, so a detailed explanation will be omitted. In the figure, transistors Ql and Q2, resistors R1 to R4, and amplifier A constitute a comparator amplifier 2. The constant voltage diode ZD constitutes a potential conversion circuit.
+Vc and -Vc indicate positive and negative power supply terminals. Here, the feature of this circuit is that the transistor Q1 is a Pnp
The transistor Q is an Npn type transistor, and a negative bias voltage is applied to the emitter of the transistor Q1, and a positive bias voltage is applied to the emitter of the transistor Q2. Therefore, the positive voltage connected to terminal 4 and terminal 5
When the absolute values of the negative voltages connected to are approximately equal, the voltage across resistor R3 connected to the input terminal of amplifier A becomes approximately zero. The output of this amplifier A is negatively feedback coupled to terminal 5 via diode ZD, and the other input terminal of this amplifier A is fixed to ground potential by resistor R4, so that the input terminal of this amplifier is always zero. It acts so that it becomes. As a result, positive and negative reference voltages having exactly equal absolute values are generated at terminals 4 and 5, and can be supplied to the encoding circuit and used. As described above, according to the present invention, positive and negative reference voltages with equal absolute values, suitable for supplying to high-speed, high-precision analog-to-digital converters or digital-to-analog converters, can be obtained using an extremely simple compensation circuit. Can be done.

In addition, in the above explanation, it was stated that only the voltage from the potential conversion circuit 3 is applied to the terminal 5, but by applying a voltage close to V2 to the terminal 5 from another power source with a relatively high power supply impedance from the outside, , the power of the comparison amplifier circuit 2 can be reduced.

In other words, if the load circuit connected to terminal 5 and using this reference voltage is a circuit that consumes current, if a voltage close to V2 is applied to this terminal 5 from another power supply, the load circuit will be connected to this other power supply. A current is supplied from the power supply, and only a small amount of current needs to be supplied from the comparison amplifier circuit 2. Conventionally, in various reference voltage generation circuits, when the load connected to the output terminal is a circuit that consumes current, a circuit with a large internal resistance generates a voltage equal to the reference voltage at the output terminal. This is equivalent to a method in which the load on the reference voltage generation circuit is reduced by connecting a power source to the reference voltage generating circuit. In the explanation of the above example, it has been described that a positive reference voltage is applied, but the present invention can also be implemented in the same way by applying a negative reference voltage to the negative terminal of the comparison amplifier circuit 2 and performing an Okakan connection to the positive terminal. Can be done.

Furthermore, the circuit shown in FIG. 2 does not limit the scope of the present invention, and it goes without saying that the circuit of the present invention can be constructed through various modifications.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of an embodiment of the present invention. 1... Reference voltage generation circuit, 2... Comparison amplifier circuit, 3... Potential conversion circuit, 4, 5...
...Terminal.

Claims (1)

[Claims] 1 A reference voltage generation circuit 1 that generates a reference voltage of either positive or negative polarity, the output of the reference voltage generation circuit is given to one input, and the transistors of the two input circuits are transistors of opposite conductivity types. The comparison amplifier circuit 2 is configured such that the output of the comparison amplifier circuit is level-converted to a polarity opposite to the one polarity, and the voltage applied to the one input of the comparison amplifier circuit has an equal absolute value and a polarity. A potential converter circuit 3 applies an opposite voltage to the other input of the comparison amplifier circuit, and output terminals 4 and 5 output the voltage generated at the two inputs of the comparison amplifier circuit as a reference voltage.
and a reference voltage compensation circuit.