JPS594045B2 - ディジタルシステムにおけるライン制御プロセサ - Google Patents
ディジタルシステムにおけるライン制御プロセサInfo
- Publication number
- JPS594045B2 JPS594045B2 JP11731177A JP11731177A JPS594045B2 JP S594045 B2 JPS594045 B2 JP S594045B2 JP 11731177 A JP11731177 A JP 11731177A JP 11731177 A JP11731177 A JP 11731177A JP S594045 B2 JPS594045 B2 JP S594045B2
- Authority
- JP
- Japan
- Prior art keywords
- lcp
- data
- peripheral
- descriptor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US72845876A | 1976-09-30 | 1976-09-30 | |
| US000000728458 | 1976-09-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5343443A JPS5343443A (en) | 1978-04-19 |
| JPS594045B2 true JPS594045B2 (ja) | 1984-01-27 |
Family
ID=24926936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11731177A Expired JPS594045B2 (ja) | 1976-09-30 | 1977-09-27 | ディジタルシステムにおけるライン制御プロセサ |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS594045B2 (enExample) |
| BE (1) | BE859169A (enExample) |
| CA (1) | CA1112324A (enExample) |
| CH (1) | CH632350A5 (enExample) |
| FR (1) | FR2371730A1 (enExample) |
| GB (1) | GB1574470A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6133136U (ja) * | 1984-07-30 | 1986-02-28 | 俊博 土居 | フアンクシヨンキ−の機能表示カ−ド |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6067633A (ja) * | 1983-09-20 | 1985-04-18 | Katsusato Fujiyoshi | 焼結貴金属およびその製造方法 |
| JPS6112189U (ja) * | 1984-06-27 | 1986-01-24 | 一衛 松田 | 移動及び簡易型火災警報装置 |
| JPS6177053U (enExample) * | 1984-10-24 | 1986-05-23 | ||
| JPS61120295A (ja) * | 1984-11-16 | 1986-06-07 | 日本鋼管工事株式会社 | 防災システム用制御装置 |
| JPH0645836B2 (ja) * | 1990-03-05 | 1994-06-15 | 株式会社トーキン | TiPd系形状記憶合金 |
| JPH089747B2 (ja) * | 1990-04-03 | 1996-01-31 | 株式会社トーヤマ貴金属 | 生体用機能合金 |
| CN115328829A (zh) * | 2022-08-16 | 2022-11-11 | 苏州迈为科技股份有限公司 | 一种上位机和plc之间的数据通信方法及其通信系统 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3702462A (en) * | 1967-10-26 | 1972-11-07 | Delaware Sds Inc | Computer input-output system |
| US3833930A (en) * | 1973-01-12 | 1974-09-03 | Burroughs Corp | Input/output system for a microprogram digital computer |
-
1977
- 1977-08-31 GB GB3627477A patent/GB1574470A/en not_active Expired
- 1977-09-09 CA CA286,461A patent/CA1112324A/en not_active Expired
- 1977-09-27 JP JP11731177A patent/JPS594045B2/ja not_active Expired
- 1977-09-28 FR FR7729237A patent/FR2371730A1/fr active Granted
- 1977-09-29 BE BE181278A patent/BE859169A/xx not_active IP Right Cessation
- 1977-09-30 CH CH1201077A patent/CH632350A5/fr not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6133136U (ja) * | 1984-07-30 | 1986-02-28 | 俊博 土居 | フアンクシヨンキ−の機能表示カ−ド |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1574470A (en) | 1980-09-10 |
| BE859169A (fr) | 1978-01-16 |
| CH632350A5 (en) | 1982-09-30 |
| CA1112324A (en) | 1981-11-10 |
| FR2371730A1 (fr) | 1978-06-16 |
| FR2371730B1 (enExample) | 1984-08-10 |
| JPS5343443A (en) | 1978-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4074352A (en) | Modular block unit for input-output subsystem | |
| US4106092A (en) | Interface system providing interfaces to central processing unit and modular processor-controllers for an input-output subsystem | |
| US4189769A (en) | Input-output subsystem for digital data processing system | |
| US4162520A (en) | Intelligent input-output interface control unit for input-output subsystem | |
| US4862350A (en) | Architecture for a distributive microprocessing system | |
| JPH0217818B2 (enExample) | ||
| US5444860A (en) | Translator system for message transfers between digital units operating on different message protocols and different clock rates | |
| EP0133015A2 (en) | Data transfer system | |
| JPS594045B2 (ja) | ディジタルシステムにおけるライン制御プロセサ | |
| JPH06131244A (ja) | 共有メモリの非同期アクセス方式 | |
| JPS6119062B2 (enExample) | ||
| EP0183431B1 (en) | System control network for multiple processor modules | |
| EP0174446B1 (en) | distributed multiprocessing system | |
| US6898684B2 (en) | Control chip with multiple-layer defer queue | |
| JPS616759A (ja) | メモリ共有マルチプロセツサシステム | |
| JPS6027976A (ja) | 先入先出メモリ装置 | |
| JPS6035698B2 (ja) | デ−タ処理システム | |
| US6078949A (en) | Scheme for interlocking and transferring information between devices in a computer system | |
| JP3141948B2 (ja) | 計算機システム | |
| JP2976443B2 (ja) | システムバスを介してデータをやりとりする情報処理装置 | |
| JPS5850410Y2 (ja) | 割込み優先順位制御装置 | |
| JPH11252150A (ja) | ネットワーク接続装置、及びネットワーク接続制御方法 | |
| JPH0380353A (ja) | 割り込み処理方法とデータチャネル装置 | |
| JP3442099B2 (ja) | データ転送記憶装置 | |
| JPH07109599B2 (ja) | 処理システムの情報転送装置 |