JPS59232491A - Method of producing multilayer printed circuit board - Google Patents

Method of producing multilayer printed circuit board

Info

Publication number
JPS59232491A
JPS59232491A JP10686783A JP10686783A JPS59232491A JP S59232491 A JPS59232491 A JP S59232491A JP 10686783 A JP10686783 A JP 10686783A JP 10686783 A JP10686783 A JP 10686783A JP S59232491 A JPS59232491 A JP S59232491A
Authority
JP
Japan
Prior art keywords
wiring
wiring board
wiring pattern
holes
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10686783A
Other languages
Japanese (ja)
Inventor
徹 樋口
村上 久男
武司 加納
慧 森本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP10686783A priority Critical patent/JPS59232491A/en
Publication of JPS59232491A publication Critical patent/JPS59232491A/en
Pending legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は多層印刷配線板の製造方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for manufacturing a multilayer printed wiring board.

〔背景技術〕[Background technology]

従来より、印刷配線板において多層配線を形成するにあ
たっては、第1図に示すように上面に配線パターン(9
)が形成された配線基板(2)上にスルーホール(3)
が穿孔された絶縁樹脂(10)を塗着すると共にさらに
その表面に銀ペイシト(■)を印刷する銀ジャンパー法
等が提供されているが、この方法では絶縁樹脂(lO)
は印刷で塗着するものであるから信頼性に欠け、また銀
ペイント(川の印刷は高密度配線に対応できないという
欠点があった。また、第2図に示すように配線基板(2
)のスルーホール(3)部分に銅めつき021を施す銅
スルーホール法にあっては、銅の無電解めっき、電気め
っき用の設備が必要であり、また高価になる−という欠
点があった。
Conventionally, when forming multilayer wiring on a printed wiring board, a wiring pattern (9
) is formed on the wiring board (2) through-hole (3)
There is a silver jumper method, etc. in which an insulating resin (10) with perforated holes is applied and a silver paste (■) is printed on the surface of the insulating resin (10).
Since it is applied by printing, it lacks reliability, and silver paint (printing) has the disadvantage of not being able to handle high-density wiring.
) The copper through-hole method, in which copper plating 021 is applied to the through-hole (3) part, has the disadvantage that it requires equipment for electroless copper plating and electroplating, and is expensive. .

〔発明の目的〕[Purpose of the invention]

本発明は上記の点に鑑みて成されたものであって、多層
配線が容易に形成でき、しかも信頼性が高くまた安価に
製造することができる多層印刷配線板の製造方法を提供
することを目的とするものである。
The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a multilayer printed wiring board that allows multilayer wiring to be easily formed, has high reliability, and can be manufactured at low cost. This is the purpose.

〔発明の開示〕[Disclosure of the invention]

すなわち、本発明は配線基板(2)の表面に第1の配線
パターン(1)を形成し、次いで配線基板(2)をその
樹脂の軟化温度以上に加熱した状態で配線基板(2)の
表面を加圧して第1の配線パターンt1+を配線基板(
2)内に埋設せしめて配線基板(2)の表面を平滑にし
、次いでこの配線基板(2)上にスルーホール(31が
穿孔された電気線り層相金属箔(4)を金属箔(5)が
表面側にくるように重ねて積層一体化すると共にスルー
ホール(31を第1の配線バター、7 f11位置に合
わせ、次いで金属箔(5)の表面に保護層(6)をスI
L、 −ホール(3)を覆うようパターン形状に塗布し
、エツチングにて金属箔(5)に第2の配線バター、1
/ +71を形成し、その後保護層(6)を除去した後
スルーホール(3)内に導電材料(8)を充填して第1
の配給パターンi11と第2の配線パターン(7)とを
電気的に接続することを特徴とする多層印刷配線板の製
造方法により上記目的を達成したものである。
That is, in the present invention, a first wiring pattern (1) is formed on the surface of a wiring board (2), and then the surface of the wiring board (2) is heated to a temperature higher than the softening temperature of the resin. is applied to connect the first wiring pattern t1+ to the wiring board (
2) to make the surface of the wiring board (2) smooth, and then an electric wire layered metal foil (4) with through holes (31) is buried on the wiring board (2). ) are on the surface side, and align the through holes (31 with the first wiring butter, 7 f11), and then apply the protective layer (6) on the surface of the metal foil (5).
L, - Apply the second wiring butter in a pattern shape to cover the hole (3), and then apply the second wiring butter to the metal foil (5) by etching.
/ +71 is formed, and after removing the protective layer (6), the through hole (3) is filled with a conductive material (8) and the first
The above object has been achieved by a method for manufacturing a multilayer printed wiring board, which is characterized in that the distribution pattern i11 of the second wiring pattern (7) is electrically connected to the second wiring pattern (7).

以下本発明の詳細な説明する。配線基板(2)としては
、何ら限定するものではないが、例えば金属ベース基板
、樹脂基板、フレ牛シづル基板あるいはこれらの片面基
板、両面基板、両面スルーホール基板等を用いることが
できる。この配線基板(2)の表裏両面には第3図(a
)に示すように第1の配線パターンil+が形成しであ
る。この配線基板[21をその樹脂の軟化温度以上に加
熱し、その状態で配線基板(2)の表面を加圧成形して
配線パターンfi+を配給基板(2)内に埋設する(同
図(b) )。これは、いわゆるフラッシュ成形と呼さ
れるもので、この加熱に 次に、この配線基板(2)の上に第3図(C)に示すよ
うにスルーホール(3)が穿孔された電気絶縁層付金属
箔(4)を金属箔(5)が表面側にくるように重ねて積
層一体化すると共にスルーホール(3)を第1の配線パ
ターン(1+位置に合わせる。ここで、電気絶縁層03
1としては樹脂塗布層やりりづレフ等で形成することが
できる。次に、金属箔(5)の表面に保護層(6)をス
ルーホール(3)を覆うようにパターン形状に塗布する
(同図(d))。保護層(6)としては、エツチングレ
ジストを塗布して形成しても良く、また熱可塑性のフィ
ルムを用いたテンティングによって形成するようにして
も良い。その際エツチングレジストを用いる場合にはス
ルーホール(31内にも充填するものである。次に、エ
ツチングにて金属箔(5)に第2の配線パターン(7)
を形成し、その後金属箔(5)表面及びスルーホール(
3)内の保護層(6)を除去しく同図(e))、次いで
スルーホール(3)内に半田や導電ペースト等の導電材
料(8)を充填して第1の配線パターンil+と第2の
配線パターン(7)とを電気的に接続するのである。図
中05)は電気線RIMである。
The present invention will be explained in detail below. Although the wiring board (2) is not limited in any way, for example, a metal base board, a resin board, a plastic board, a single-sided board, a double-sided board, a double-sided through-hole board, etc. thereof can be used. The front and back surfaces of this wiring board (2) are shown in Figure 3 (a).
), the first wiring pattern il+ is formed. This wiring board [21] is heated to a temperature higher than the softening temperature of its resin, and in that state, the surface of the wiring board (2) is pressure-molded to embed the wiring pattern fi+ in the distribution board (2) (Fig. ) ). This is what is called flash molding, and after this heating, an electrically insulating layer with through holes (3) drilled on the wiring board (2) as shown in FIG. 3(C). The attached metal foil (4) is stacked and integrated so that the metal foil (5) is on the front side, and the through hole (3) is aligned with the first wiring pattern (1+ position.Here, the electrical insulating layer 03
As No. 1, it can be formed by a resin coating layer or a resin coating layer. Next, a protective layer (6) is applied to the surface of the metal foil (5) in a patterned manner so as to cover the through holes (3) (FIG. 4(d)). The protective layer (6) may be formed by applying an etching resist, or may be formed by tenting using a thermoplastic film. If an etching resist is used at this time, the through holes (31) are also filled in. Next, the second wiring pattern (7) is etched on the metal foil (5).
After that, the surface of the metal foil (5) and the through hole (
3) to remove the protective layer (6) in the same figure (e), and then fill the through hole (3) with a conductive material (8) such as solder or conductive paste to form the first wiring pattern il+ and the first wiring pattern il+. The second wiring pattern (7) is electrically connected to the second wiring pattern (7). 05) in the figure is an electric wire RIM.

しかして、金属箔(5)の表面に保護層(6)をスルー
ホール(3)を覆うようにパターン形状に塗布してエツ
チングにて金属箔(5)に第2の配線パターン(7)を
形成し、その後保護層(6)を除去した後スルーホール
(31内に導電材料(8)を充填して第1の配線パター
ンil+と第2の配線J\ターン(7)とを電気的に接
続するようにすることにより、配線基板(2)の種類を
問わず、どの種の配線基板(2)であっても簡単に多層
配線を形成することができるものであり、しかも導電材
料(8)を直接ス11.−ホール(31内に充填して接
続するものであるから銅スルーホール法と同等の信頼性
があると共に、めっき用の設備等も不要で安価に製造す
ることができるものである。まtこ、箇1の配線パター
ン+11を配線基板(21内に埋設して配線基板(2)
の表面を平滑にすることにより、エツチングレジストの
塗布がし易くなり、高精度の配線パターン(7)が形成
できるものであり、また電子部品を実装する場合の信頼
性も高くなるものである。さらに、2層以後の金属箔(
5)表面を平滑にすることができるので、高多層配線板
の製造が行ない易く、信頼性を高めることができるもの
である。なお、上記実施例では配線基板(2)の両面に
多層の配線パターン+71 [71を形成するようにし
たが片面に配線パターン(7)を形成するようにしても
良い。
Then, a protective layer (6) is applied to the surface of the metal foil (5) in a patterned manner so as to cover the through holes (3), and a second wiring pattern (7) is formed on the metal foil (5) by etching. After removing the protective layer (6), the conductive material (8) is filled in the through hole (31) to electrically connect the first wiring pattern il+ and the second wiring J\ turn (7). By making connections, multilayer wiring can be easily formed regardless of the type of wiring board (2). ) is directly filled into the hole (31) for connection, so it has the same reliability as the copper through-hole method, and can be manufactured at a low cost without the need for plating equipment. Then, the wiring pattern of item 1 + 11 is buried in the wiring board (21) to form the wiring board (2).
By making the surface smooth, it becomes easier to apply etching resist, a highly accurate wiring pattern (7) can be formed, and the reliability when mounting electronic components is also increased. Furthermore, the metal foil after the second layer (
5) Since the surface can be made smooth, it is easy to manufacture a high multilayer wiring board and the reliability can be improved. In the above embodiment, the multilayer wiring pattern +71 [71] was formed on both sides of the wiring board (2), but the wiring pattern (7) may be formed on one side.

〔発明の効果〕〔Effect of the invention〕

上記のように本発明は、表面に第1の配線バタ−ンが形
成された配線基板上にスルーホールが穿孔された電気絶
縁層付金属箔を金属箔が表面側にくるように重ねて積層
一体化すると共にスルーホールを第1の配線パターン位
置に合わせ、次いで金属箔の表面に保護層をスルーホー
ルを覆うようパターン形状に塗布し、エツチングにて金
層箔に第2の配線パターンを形成し、その後保護層を除
去した後スルーホール内に導電材料を充填して第1の配
線パターンと第2の配線パターンとを電気的に接続した
ので、配線基板の種類を問わず多層配線が容易に形成で
き、しかも信頼性が高く、また安価に製造することがで
きるものである。また、配線基板の表面に第1の配線J
\ターンを形成し、次いで配線基板をその樹脂の軟化温
度以上に加熱した状態で配線基板の表面を加圧して配線
パターンを配線基板内に埋設せしめて配線基板の表面を
平滑にしたので、印刷信頼性、印刷精度が高くなり精密
な配線パターンを形成することができるものであり、ま
た部品実装の信頼性を高めることができると共に高多層
印刷配線板の製造が行ない易く信頼性を高めることがで
きるものである。
As described above, in the present invention, metal foils with electrically insulating layers having through-holes are stacked on a wiring board having a first wiring pattern formed on the surface thereof, with the metal foils facing toward the front surface. At the same time, the through holes are aligned with the first wiring pattern position, and then a protective layer is applied to the surface of the metal foil in a pattern shape so as to cover the through holes, and a second wiring pattern is formed on the gold layer foil by etching. Then, after removing the protective layer, the through holes were filled with conductive material to electrically connect the first wiring pattern and the second wiring pattern, making multilayer wiring easy regardless of the type of wiring board. It is highly reliable, and can be manufactured at low cost. In addition, a first wiring J is formed on the surface of the wiring board.
After forming the turn, the surface of the wiring board was heated to a temperature higher than the softening temperature of the resin, and the wiring pattern was buried in the wiring board by pressing the surface of the wiring board to make the surface of the wiring board smooth. It has high reliability and printing accuracy, making it possible to form precise wiring patterns.It also increases the reliability of component mounting, and makes it easier to manufacture high multilayer printed wiring boards, increasing reliability. It is possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の一部切欠断面図、第2図は他の従来例
の一部切欠断面図、第3図(a)乃至(f)は本発明一
実施例の製造法を示す一部切欠断面図である。 +11は第1の配線パターン、(2)は配線基板、(3
)はスルーホール、(4)は電気絶縁層付金属箔、(5
1は金層箔、(6)は保護層、(7)は第2の配線バタ
゛−ン、(8)は導電材料である。 代理人 弁理士  石 1)長 七
FIG. 1 is a partially cutaway sectional view of a conventional example, FIG. 2 is a partially cutaway sectional view of another conventional example, and FIGS. FIG. +11 is the first wiring pattern, (2) is the wiring board, (3
) is a through hole, (4) is a metal foil with an electrically insulating layer, (5
1 is a gold layer foil, (6) is a protective layer, (7) is a second wiring pattern, and (8) is a conductive material. Agent Patent Attorney Ishi 1) Choshichi

Claims (1)

【特許請求の範囲】[Claims] +11配線基板の表面に第1の配線パターンを形成し、
次いで配線基板をその樹脂の軟化温度以上に加熱した状
態で配線基板の表面を加圧して第1の配線パターンを配
線基板内に埋設せしめて配線基板の表面を平滑にし、次
いでこの配線基板上にスルーホールが穿孔された電気絶
縁層付金属箔を金属箔が表面側にくるように重ねて積層
一体化すると共にスjし一ホールを8S1の配線パター
ン位置に合わせ、次いで金ルI箔の表面に保護層をスル
ーホールを覆うようパターン形状に塗布し、エツチング
にて金属箔に第2の配線パターンを形成し、その後保護
層を除去した後スルーホール内に導電材料を充−填して
第1の配線パターンと第2の配線パターンとを電気的に
接続することを特徴とする多層印刷配線板の製造方法。
+11 Forming a first wiring pattern on the surface of the wiring board,
Next, the surface of the wiring board is heated to a temperature higher than the softening temperature of the resin, and the first wiring pattern is buried in the wiring board to smooth the surface of the wiring board, and then the surface of the wiring board is smoothed. Laminate the metal foils with the electrical insulating layer with the through-holes perforated so that the metal foils are on the front side, and align the holes with the wiring pattern position of 8S1. Then, a protective layer is applied in a pattern to cover the through-holes, a second wiring pattern is formed on the metal foil by etching, and after the protective layer is removed, a conductive material is filled into the through-holes to form a second wiring pattern. A method for manufacturing a multilayer printed wiring board, comprising electrically connecting a first wiring pattern and a second wiring pattern.
JP10686783A 1983-06-15 1983-06-15 Method of producing multilayer printed circuit board Pending JPS59232491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10686783A JPS59232491A (en) 1983-06-15 1983-06-15 Method of producing multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10686783A JPS59232491A (en) 1983-06-15 1983-06-15 Method of producing multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPS59232491A true JPS59232491A (en) 1984-12-27

Family

ID=14444489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10686783A Pending JPS59232491A (en) 1983-06-15 1983-06-15 Method of producing multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPS59232491A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521538A (en) * 1991-07-17 1993-01-29 Hitachi Cable Ltd Film carrier device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521538A (en) * 1991-07-17 1993-01-29 Hitachi Cable Ltd Film carrier device

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