JPS59229651A - Device for developing system - Google Patents

Abstract

PURPOSE:To form a precise brake signal with a simple constitution by providing the titled device with a memory which is simultaneously selected in accordance with a memory access from a computer system developing the system. CONSTITUTION:The brake memory BM to be simultaneously selected in accordance with a memory access from the computer system developing the system is prepared. The contents of the brake memory BM are successively read out in accordance with the execution of a program. The brake memory BM supplies a brake signal allowing the execution to be continued if the read-out signal is ''0'' or stopping the execution if ''1'' to a brake control circuit BC. Receiving the brake signal, the brake control circuit BC stops the execution of the program in the microprocessor MCU.

Description

Detailed Description of the Invention [Technical Field] The present invention relates to a system development device, such as an ICE (in-circuit emulator) or an ASE
This invention relates to technology that is effective for microcomputer system development devices such as the Adaptive System Evaluator (Adaptive System Evaluator).

[Background technology]

Systems using microcomputers are usually small-scale and equipped with only the necessary functions. On the other hand, since the information processing becomes complicated,
Synchroscopes and logic analyzers alone are insufficient for debugging such systems, and cannot deal with runaway programs or system abnormalities that are poorly reproducible.

For debugging such a system, a device with functions such as displaying the flow of the program and acquiring and displaying the bus information and external signals just before the user system stopped over multiple cycles in °C is required. It becomes necessary. ICE is used for debugging such systems.
Or an ASE device.

One of the functions required of ICE or ASH is the ability to stop (break) the execution of a specific program step. In order to realize such a function, for example, it is conceivable to designate a specific instruction word and to form the above-mentioned break signal by comparing it with the instruction word being executed. However, research by the inventor of the present application has revealed that this method causes the following problems. That is, when stopping execution using multiple types of command words, latch circuits and comparators corresponding to the number of command words are required. Further, since the judgment is made only based on the command word, it becomes impossible to perform an accurate break.

[Purpose of the invention]

An object of the present invention is to provide a system development cylinder having a simple configuration and an easy-to-use break function.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, provide a memory that is simultaneously selected according to the memory access of the computer system for system development, and write "1" or "" in the address part of the location where you want to break.
A break signal of 0'' is written and read out to form a break signal.

〔Example〕

FIG. 1 shows a schematic external appearance of an ASH showing an embodiment of the present invention.

The box box contains the microprocessor that constitutes the ASE, and is connected to the microprocessor MCU socket of the user system UMC for system debugging via a flat cable with an MCU (microprocessor) connector. . and,
The other flat cable connects the system development equipment EM.
It is connected to S. Note that, although there are no particular restrictions, when the user system [JMC] is actually operated, its microprocessor MCU socket is equipped with a one-chip ROM containing a ROM in which the user's desired program is written. Microb 17 Setusa MCU (Microcomputer Kuuniso H is installed.

With such a connection, the microprocessor of the box box operates according to the development program, etc. on the floppy disk included in the system development device EMS, and performs various functions such as inputting data, creating programs, etc. Changes, etc. are integrated into the system development equipment EMS.
This is performed using a keyboard or the like, and the necessary data is displayed on a display device or the like connected to the system development device 6:.

FIG. 2 shows a system diagram explaining the above-mentioned break kite function.

The microprocessor MCU uses a RAM (random access memory) as its main storage and performs predetermined data processing according to a program written in a specific memory area. In this embodiment, a break memory BM having the same memory space as the RAM is provided. Although this break memory BM is not particularly limited, a RAM having a ×1 bit configuration is used. Further, although not particularly limited, it is convenient to utilize empty bits in the 1Q device.

In this embodiment, for program depacking, etc., the address of the program step to be broken is extracted in advance, the address L/th is determined, and 1'', for example, is written in the break memory BM. All other parts are set to "0". Writing such a break signal to the break memory BM is performed by, for example, software detecting an address where a bit pattern corresponding to a specific instruction word can be obtained. This is done by automatically writing the above break signal to 1''.

After such preparatory operations, the program is executed. According to this program execution, the contents of the break memory BM are read out one after another.

Then, if the read signal is "0", the execution is continued, and if it is "1", the break signal B is supplied to the break control circuit BC, which causes the execution to be stopped. When the break control circuit BC is supplied with the break signal B, the break control circuit BC stops the program execution of the microprocessor MCU, and displays, for example, the bus information at that time.

If a break location is automatically designated by software, a break signal will also be written to a data area where data with the same bit configuration (bit pattern) as that instruction word has been written.

Therefore, in this embodiment, the microprocessor MCU
The break signal B from the break memory BM is sent to the break control circuit BC through the gate circuit G controlled by the instruction fetch signal LIR formed by the break memory BM. As a result, execution of the program can be stopped accurately at the break point set above.

Although there are no particular restrictions, when debugging the system,
The microprocessor MCU operates not according to a program written in an internal ROM, but according to a program written in a RAM.

〔effect〕

(By providing a break memory in the same address space as the 11 memory address space, the break signal is written directly to A, so the effect is that breaks can be made at any number of locations.) is obtained.

(2) According to (1) above, tAWJ is applied to microcomputer systems that require system monitoring, debugging, etc.
The effect is that it is possible to increase the number of people.

(3) The above (]) and (2) provide the effect that program debugging and the like can be performed efficiently.

(4) By configuring the break memory using empty bits in the main memory, the system can be simplified.

Although the invention made by the present inventor has been specifically explained based on Examples above, this invention is not limited to the above Examples (although it is possible to make various changes without departing from the gist of the invention). For example, the gate circuit G may be omitted, or the break location may be specified by writing @0'' into the break memory BM.

[Field of Application] The present invention can be widely used as a device for performing system debugging of a microcomputer system.

[Brief explanation of the drawing]

FIG. 1 is a schematic external view of an ASE device showing an embodiment of the present invention, and FIG. 2 is a system block diagram for explaining its break function. BOX...Box, EMS...System 5 [i11 device S, UMC...User system, MCU...Microprocessor, BM...Break memory, BC...
Break control circuit, RAM...main memory, G...gate circuit, AD...address bus, DA...data path

Claims (1)

[Claims] 1. The present invention is characterized by including a circuit that provides a memory that is simultaneously selected according to the memory access of a computer system that performs system development, and uses a specific signal detected from this memory as a break signal for program execution. system development equipment. 2. The system development apparatus according to claim 1, wherein the break signal is generated via a gate circuit controlled by an instruction fetch signal. 3. The above memory is a RAM with a ×1 bit configuration,
3. The system development apparatus according to claim 1, wherein "1" or "0" of the stored information is set and taken out as a break signal. 4. The above memory uses empty bits of the main storage device/jj' I+, f? A system development apparatus according to claim 1, 2, or 3.