JPS59221127A - 時定数回路 - Google Patents

時定数回路

Info

Publication number
JPS59221127A
JPS59221127A JP9658383A JP9658383A JPS59221127A JP S59221127 A JPS59221127 A JP S59221127A JP 9658383 A JP9658383 A JP 9658383A JP 9658383 A JP9658383 A JP 9658383A JP S59221127 A JPS59221127 A JP S59221127A
Authority
JP
Japan
Prior art keywords
tap coefficient
tap
counter
signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9658383A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0149212B2 (enrdf_load_stackoverflow
Inventor
Setsu Fukuda
福田　節
Toshitaka Tsuda
俊隆 津田
Kazuo Yamaguchi
一雄 山口
Takafumi Nakajo
中条　孝文
Tadakatsu Kimura
木村　忠勝
Norio Tamaki
規夫 玉木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP9658383A priority Critical patent/JPS59221127A/ja
Publication of JPS59221127A publication Critical patent/JPS59221127A/ja
Publication of JPH0149212B2 publication Critical patent/JPH0149212B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP9658383A 1983-05-31 1983-05-31 時定数回路 Granted JPS59221127A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9658383A JPS59221127A (ja) 1983-05-31 1983-05-31 時定数回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9658383A JPS59221127A (ja) 1983-05-31 1983-05-31 時定数回路

Publications (2)

Publication Number Publication Date
JPS59221127A true JPS59221127A (ja) 1984-12-12
JPH0149212B2 JPH0149212B2 (enrdf_load_stackoverflow) 1989-10-24

Family

ID=14168961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9658383A Granted JPS59221127A (ja) 1983-05-31 1983-05-31 時定数回路

Country Status (1)

Country Link
JP (1) JPS59221127A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0149212B2 (enrdf_load_stackoverflow) 1989-10-24

Similar Documents

Publication Publication Date Title
US6424175B1 (en) Biased control loop circuit for setting impedance of output driver
EP0142144A3 (en) Fractionally spaced equalization method and equalizer using nyquist-rate coefficient updating
JPH0746788B2 (ja) 自動線路等化器
US5281870A (en) Current controller
JPS59221127A (ja) 時定数回路
US6282253B1 (en) Post-filtered recirculating delay-locked loop and method for producing a clock signal
JPH01144738A (ja) ウインドウ法同期保護回路
JP3377669B2 (ja) シンク検出方法及びシンク検出回路
JPH08138324A (ja) Ｅｐｒ４信号の位相差検出回路
US4691327A (en) Clock regenerator
JP2002064470A (ja) 誤り制御方法
JPS60244124A (ja) デジタル・フエ−ズロツクル−プ装置
JPH03274818A (ja) 自動等化回路
JPH0248994B2 (ja) Shingohoseisochi
JP3122563B2 (ja) 位相同期回路
JPH0129877Y2 (enrdf_load_stackoverflow)
JP2806938B2 (ja) 符号再生方式
JPH04360422A (ja) 復号化方法
JPS59102167A (ja) 移動平均値検出装置
JPS637485B2 (enrdf_load_stackoverflow)
JPH0518485B2 (enrdf_load_stackoverflow)
JPH0614623B2 (ja) ディジタル制御形ａｇｃ等化方法
JPH02288640A (ja) 光受信回路
JPS63214022A (ja) 受信回路
JPH024535Y2 (enrdf_load_stackoverflow)