JPS59218760A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59218760A
JPS59218760A JP58092834A JP9283483A JPS59218760A JP S59218760 A JPS59218760 A JP S59218760A JP 58092834 A JP58092834 A JP 58092834A JP 9283483 A JP9283483 A JP 9283483A JP S59218760 A JPS59218760 A JP S59218760A
Authority
JP
Japan
Prior art keywords
film
aluminum
grown
layer
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58092834A
Other languages
English (en)
Other versions
JPH0214778B2 (ja
Inventor
Taiichi Inoue
井上　泰一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58092834A priority Critical patent/JPS59218760A/ja
Publication of JPS59218760A publication Critical patent/JPS59218760A/ja
Publication of JPH0214778B2 publication Critical patent/JPH0214778B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05557—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4807—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は半導体装置に関する。
半導体装置、特にアルミニウム材をその主配線材料とす
る装置では安価なプシスチック容器に塔載した場合その
アルミが侵入水分によって溶けると言う、言わゆるアル
ミ腐蝕がその装置の耐湿性の信頼度を損う大きな要因と
なっている。その為に配線アルミ上に疎水性の絶縁膜例
えばシリコン窒化膜等をもって被服し水分の侵入を抑制
してアルミ腐蝕を防ぐ手段が公知である。しかしながら
一般に半導体装置よシワイヤボンディングで電極を取シ
出す言わゆるパッド部はその性格上前記絶縁膜でおおう
事はできず、アルミ腐蝕に弱い構造となっている。特に
パッド部は水や汚れがワイヤーと封止材とのすき間よシ
侵入し易く前述した手触のが発生しにくい構造、即ち耐
湿性の信頼性を向上できるパッド部の構造を提供するも
のである。
従来技術においては第１図に示す様に絶縁膜１の上にア
ルミ配線層２をバターニングしてその後表面保護用のシ
リコン酸化膜４を気相成長する。
この時通常のＣＶＤ法では温度が３００〜４００℃まで
上がるのでアルミニウムの粒塊が成長しその配線表面が
凸凹になってしまう。そこでパッド開口用の酸化膜除去
をウェトエッチをＨＦを含む溶液で行うとパッド上のア
ルミニウムも粒塊にそって侵蝕され図に示す様凸凹の激
しいバット表面が形成される。そしてこの部分にボンテ
ィングワイヤーが接続されるわけであるがそのワイヤ径
はパッド開口部よシ小さい為にワイヤーの囲りでバンド
アルミの凸凹な表面が露呈する墨になる。この部に＃腐
蝕が発生する４４になる。そこで前述した様に全面をプ
ラズマ法のシリコン窒化膜でおおう方法も考えられるか
、フラズマ窒化膜は公知の様に酸化膜に比べて絶縁抵抗
が小さく電荷をとシ込み易くその為に半導体装ｆトｖの
信頼度を失わせる事が知られ１いる。！［）にバッド囲
りに用いた場合パッド電極からシリコン窒化膜中に静電
気等によシミ荷の注入が生じ導電率の差によシ窒化膜−
酸化膜界面にその電荷がた′１シ、ＭＯ８効果を誘発し
不本意なる電流路を形成し結果的に半導体装置の誤動作
を発生ずる事も知られている。
本発明はこの様な欠点を見服して信頼肢の高いしかも簡
単につくれるパッド電極構造を提供するものである。
本発明の特徴は、半導体基体表面に設けられたシリコン
酸化被膜上に金属配線層を有する半導体装置において、
前記金属配線上に略同−形状を有する疎水性被膜を有し
、前記疎水性被膜の除去された部分でワイヤボンティン
ダによυ箱゛１極を引き出している半導体装置にある。
次に本発明につき第２区に基づき説明する。
第２図においで、絶縁被膜１の上にアルミニウム層２を
蒸着又はスパッタ法で全面に約１μの厚味被着しつづい
てその上にシリコン窒化膜３を約１０００〜ｚｏｏｏＮ
をプラズマ法で成長する。この時気相成長のアルミナ膜
、又は多結晶シリコン膜でもよい。その後公知のフカレ
ジスト法によシ所望のパターンに前記シリコン窒化膜３
及びアルミニウム配線層２を形状形成する。そして全面
にシリコン酸化膜４を通常の３００″Ｃ程の？７ｉｉ’
、度で（、”ＶＩＪ法約１μ〜１５μによ）成長し開孔
部５を選択的に開口する。この時３のシリコン窒化膜と
４のシリコン酸化膜とのエツチング選択比を利用して開
孔部に角度をつけたり開孔部の大きさを変えＺ１笠が可
能である。このように本発明の実施例に示した如く、ア
ルミニウム配線層２を被着した際に続けて低温のプラズ
マ法にてシリコン窒化膜３を成長する串でアルミニウム
表面のヒーロツク発生を抑制できるため平滑なアルミニ
ウム表面が得られる。しかも開孔部５は最終的にはシリ
コン窒化膜３の除去によって達成されるのでアルミニウ
ム２とはプラズマ法により選択性の良いエツチングが実
施できるので、開孔部下のアルミニウムの表面を痛める
程度を少なくできる。
この什にアルミ表１ηｉが平滑な場合、水分や汚れは段
差部特Ｑ′にバンド周囲の絶縁膜とアルミとの接触面に
集中し易いので本発明の様にその１ＶＩＳ分に疎水性の
ゾリニン韻化膜忙設ける拳でＡＩ腐蝕の発生を顯４ｋに
抑制できるのである。しかも、シリコン窒化膜３は第２
図に示す如くアルミニウム配線上にしか残留しムいので
この膜に能う注入電荷変動は半導体装Ｉ１．【の機能を
損う恐れも又、皆無であるともえる。
以上記述しでき′＃ｃ徐に本発明より耐湿性の秀い出た
、しかも電気的特性の安定な半導体装置が在来技術の組
み合せで容易に達成できるのである。
【図面の簡単な説明】
第１図は従来技術を示す断面図であり、小２図は本発明
の実施例を示す断面図である。 岡、図において、１・・・・・・厚いシリコン酸化膜、
２・・・・・・ハソドのアルミ電極、３・・・・・・疎
水性シリコン窒化膜、４・・・・・・ＣＶＤシリコン酸
化膜、５・・・・・・パット開１コ部、６・・・・・・
ボンティングワイヤーである。

Claims (1)

    【特許請求の範囲】
  1. 半導体基体表面に設けられたシリコン酸化被膜上に金属
    配線層を有する半導体装置において、前記金属配線上に
    略同−形状を有する疎水性被膜を有し、前記疎水性被膜
    の除去された部分でワイヤポンディングによシミ極を引
    き出している事を特徴とする半導体装置。
JP58092834A 1983-05-26 1983-05-26 半導体装置 Granted JPS59218760A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58092834A JPS59218760A (ja) 1983-05-26 1983-05-26 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58092834A JPS59218760A (ja) 1983-05-26 1983-05-26 半導体装置

Publications (2)

Publication Number Publication Date
JPS59218760A true JPS59218760A (ja) 1984-12-10
JPH0214778B2 JPH0214778B2 (ja) 1990-04-10

Family

ID=14065453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58092834A Granted JPS59218760A (ja) 1983-05-26 1983-05-26 半導体装置

Country Status (1)

Country Link
JP (1) JPS59218760A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5194931A (en) * 1989-06-13 1993-03-16 Kabushiki Kaisha Toshiba Master slice semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5194931A (en) * 1989-06-13 1993-03-16 Kabushiki Kaisha Toshiba Master slice semiconductor device

Also Published As

Publication number Publication date
JPH0214778B2 (ja) 1990-04-10

Similar Documents

Publication Publication Date Title
US5470793A (en) Method of via formation for the multilevel interconnect integrated circuits
JPH0754809B2 (ja) 集積回路の接点孔への相互接続線の自動位置決め方法
JP3534269B2 (ja) 半導体装置及びその製造方法
JPS59110122A (ja) 窒化膜を有する半導体集積回路装置
JPS59218760A (ja) 半導体装置
JPS594853B2 (ja) 半導体装置
JP2000243836A (ja) 半導体素子の配線形成方法
JPH05129281A (ja) 半導体装置の製造方法
JPS5999718A (ja) 半導体装置
JPS60124951A (ja) 半導体装置の製造方法
JPH0332214B2 (ja)
JPS6328069A (ja) 半導体装置
JPH01262646A (ja) 半導体装置の製造方法
JPS60145628A (ja) 半導体装置
JPH01268150A (ja) 半導体装置
JPH113979A (ja) シールドルーム付きリファレンスセル
JPS59167059A (ja) 半導体装置の製造方法
JPS6025255A (ja) 半導体装置の製造方法
JPS58197856A (ja) 半導体装置
JPS5825229A (ja) 半導体装置の製造方法
JPH1079358A (ja) スパッタ法
JP3087702B2 (ja) 半導体装置およびその製造方法
JPS60128637A (ja) 配線構造およびその製造方法
JPH0338041A (ja) 半導体装置の製造方法
JP2524526B2 (ja) 半導体装置